IDT Tsi340-RDK1, User Manual

Page 1: ...valuation Board User Manual 80E3000_MA002_02 September 19 2009 6024 Silver Creek Valley Road San Jose California 95138 Telephone 408 284 8200 FAX 408 284 3572 Printed in U S A 2009 Integrated Device Technology Inc ...

Page 2: ...n request Items identified herein as reserved or undefined are reserved for future definition IDT does not assume responsibility for conflicts or incompatibilities arising from the future definition of such items IDT products have not been designed tested or manufactured for use in and thus are not warranted for applications where the failure malfunction or any inaccuracy in the application carrie...

Page 3: ... 2009 This document was rebranded as IDT It does not include any technical changes 80E3000_MA002_01 Formal May 2007 This is the first version of this document Related Documents Tsi340 Evaluation Board Schematics 1 1 Overview This document is divided in two sections board design and board layout In board design the components on the board and board functionary are explained In the board layout sect...

Page 4: ...e Supply Voltage 3 3V Package FQFP 128pin 1 1 2 2 Primary PCI Connector 32 bit universal PCI finger connector Support both 3 3 V and 5 V PCI slot Compliant with PPCI Specification Revision 2 3 VIO pins are not supported 1 1 2 3 Secondary PCI Connector Four 3 3 V 32 bit PCI connector slots PCI clocking generated from Tsi340 Compliant with PCI Specification Revision 2 3 1 1 2 4 Board Form Factor For...

Page 5: ...he Tsi340 is wired to a PCI finger connector The secondary PCI side is wired to four 32 bit 3 3 V PCI connectors Figure 1 shows the board block diagram Figure 1 Board Block Diagram Many features can by exercised with shunt jumpers and switches Tsi340 PCI to PCI Bridge Secondary Interface 3 3V 5V 32Bit PCI Finger Edge Connector 3 3V 32Bit PCI Thru Hole Connector Slot B 66MHz 3 3V 32Bit PCI Right An...

Page 6: ... board has the option of forcing the PCI host s M66EN signal low with a DIP switch setting on S1 Refer to DIP Switch Package Individual Switch Position on page 14 for more information 2 2 1 2 Secondary PCI Clock Domain Tsi340 has four secondary clock outputs which provide PCI_CLKin for four on board PCI connectors The secondary clock outputs are derived from the primary PCI clock input 2 2 2 M66EN...

Page 7: ...urrent draw per rail for the bridge board with no cards plugged in is indicated in Table 2 2 4 1 Finger Connector Current Limit When plug in cards are added to the Tsi340 evaluation board the current draw must not exceed the capacity of the finger connector The maximum current draw per rail for the bridge board with cards plugged in is indicated in Table 3 Table 1 Arbitration Assignment Tsi340 REQ...

Page 8: ...lated from the board s 3 3 V plane This feature is used to evaluate the current draw of the PCI bridge The connection from the Tsi340 supply to the board 3 3 V is done through three 0 Ohm resistors R5 R6 R7 Current measurement can be done by removing the resistors and insert an amp meter between the resistor pads on the PCB 2 4 3 PRSNT Pin Power Setting on Primary PCI The finger connector PRSNT 1 ...

Page 9: ...same voltage as the system The secondary side voltage is independent of the primary side voltage The secondary side signalling voltage is hard wired to 3 3 V If 5 V signalling is required on the secondary side the PCB assembly must be modified in the following ways Remove the R1 R2 R3 resistors Solder jumper wires AWG22 between the 5V test pads and the SVIO test pads Figure 3 Modified PCB Traces f...

Page 10: ...pt connections designation and AD line connections Table 5 shows the IDSEL assignments 2 6 Resets Tsi340 is reset from the system host reset signal from the finger connector The secondary side reset is driven by Tsi340 There is no manual reset on the board Table 4 Interrupt and IDSEL Mapping Finger Connector Interrupt J1 AD27 J2 AD24 J3 AD25 J4 AD26 Int A Int B Int A Int D Int C Int B Int C Int B ...

Page 11: ...document the component placement and the setting options are explained 3 1 PCB Layers The Tsi340 Printed Circuit Board PCB stack up is made of the following four layers Layer 1 PCB primary side where most traces are routed Layer 2 Ground plane Layer 3 Power plane Layer 4 Secondary side Figure 4 shows the four layers of the PCB Figure 4 PCB Stack Up ...

Page 12: ...gy www idt com 3 2 Board Dimensions The board dimensions are based on PCI standard for a 32 bit Variable Height Short Add in card However the height of the card exceeds the maximum specified in the standard The board dimensions are shown in Figure 5 Figure 5 Board Dimensions 5 5 7 87 ...

Page 13: ...valuation Board User Manual 80E3000_MA002_02 Integrated Device Technology www idt com 3 3 Component Placement The placement of the components jumpers and switches are shown in Figure 6 Figure 6 Component Placement ...

Page 14: ..._CLKRUN is pulled up for test purpose only 2 Tsi340 LOO pin connection OFF ON LOO is held low for test purpose only OFF LOO is pulled up for normal operation 3 P_RST signal level OFF ON Force P_RST to low for test purpose only OFF Normal operation 4 PCI_M66EN signal level OFF ON Force PCI_M66EN to low for 33MHz clocking operation OFF Normal operation PCI clock frequency is determined by primary PC...

Page 15: ...t com 3 5 Connectors Board connectors are used to add cards and power supplies to the Tsi340 board 3 5 1 J1 through J4 Connectors PCI Plug in Card J1 J2 J3 J4 are used to connect plug in card on Tsi340 s secondary PCI side The connector s pin assignment is standard PCI 32 bit 3 3 V connectors ...

Page 16: ...oard This connector is only required if the voltage drop at the plug in card is to high Table 11 shows the pin assignments for the J5 connector Table 7 J7 Pin Assignment Pin Signal Assignment J7 pin location 1 3 3V 2 3 3V 3 GND 4 5V 5 GND 6 5V 7 GND 8 N C 9 N C 10 12V 11 3 3V 12 12V 13 GND 14 GND 15 GND 16 GND 17 GND 18 N C 19 5V 20 5V 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 ...

Page 17: ...re brought out to test points The clock test points are listed in Table 9 3 7 2 Test Point for Secondary VIO The bridge board can plug into a 3 3 V or 5 V systems The primary side input output signaling uses the same voltage as the system The secondary side voltage is independent of the primary side voltage The Finger connector JTAG signals TDI and TDO are connected together on the board Table 8 L...

Page 18: ...7 38 C73 C76 C81 82 GRM188R71H102MA01D MURATA X7R CER SMT 0 001UF 20 50V 0603 5 C60 C64 65 C69 0603ZD105KAT2A AVX X5R CER SMT 1UF 10 10V 0603 6 D1 2 HSMG C150 AGILENT GREEN LED UNTINTED DIFFUSED 7 J1 RBB60DHAS S793 SULLINS PCI 3 3V 32BIT RIGHT ANGLE 100MIL ROW TO ROW 8 J2 4 145154 4 AMP PCI MOTHERBOARD 32BIT 3 3V THRU 9 J5 39 29 9202 MOLEX ATX PWR JACK 0 165 PITCH MINI FIT JR 10 R1 ERJ 3EKF1103V P...

Page 19: ...om 15 R43 46 ERJ 3GEYJ330V PANASONIC RES SMT 33 OHM 0 1W 5 0603 16 S1 2 1437590 2 TYCO DIPSWITCH 8SWITCHES 17 TP1 16 TESTPOINT IDT Test points 18 U1 TSI340 66CQ IDT PCI TO PCI BRIDGE 32BITS 66MHZ Table 10 Tsi340 Evaluation Manual Build of Material Item RefDes Part Number Manufacturer Description ...

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