NANO-ULT3 SBC
Page 55
The location of the AT/ATX mode select switch is shown in
below.
Figure 4-11: AT/ATX Mode Select Switch Location
4.6.2 Clear CMOS Button
CN Label:
J_CMOS1
CN Type:
Button
CN Location:
See
If the NANO-ULT3 fails to boot due to improper BIOS settings, use the button to clear the
CMOS data and reset the system BIOS information.
The location of the clear CMOS button is shown in
Figure 4-12: Clear CMOS Button Location
Summary of Contents for NANO-ULT3
Page 2: ...NANO ULT3 SBC Page II Revision Date Version Changes May 26 2016 1 00 Initial release ...
Page 14: ......
Page 15: ...NANO ULT3 SBC Page 1 Chapter 1 1 Introduction ...
Page 24: ...NANO ULT3 SBC Page 10 Chapter 2 2 Unpacking ...
Page 28: ...NANO ULT3 SBC Page 14 Chapter 3 3 Connectors ...
Page 60: ...NANO ULT3 SBC Page 46 Chapter 4 4 Installation ...
Page 77: ...NANO ULT3 SBC Page 63 Figure 4 18 Motherboard Installation Example ...
Page 84: ...NANO ULT3 SBC Page 70 Chapter 5 5 BIOS ...
Page 124: ...NANO ULT3 SBC Page 110 Chapter 6 6 Software Drivers ...
Page 128: ...NANO ULT3 SBC Page 114 Appendix A A Regulatory Compliance ...
Page 130: ...NANO ULT3 SBC Page 116 B Product Disposal Appendix B ...
Page 132: ...NANO ULT3 SBC Page 118 Appendix C C BIOS Menu Options ...
Page 135: ...NANO ULT3 SBC Page 121 Appendix D D Terminology ...
Page 140: ...NANO ULT3 SBC Page 126 Appendix E E Digital I O Interface ...
Page 143: ...NANO ULT3 SBC Page 129 Appendix F F Watchdog Timer ...
Page 146: ...NANO ULT3 SBC Page 132 Appendix G G Hazardous Materials Disclosure ...