WAFER-ULT/ULT2-i1 3.5" SBC
Page 101
5.4.1.2 Memory Configuration
Use the
Memory Configuration
submenu (
Aptio Setup Utility – Copyright (C) 2015 American Megatrends, Inc.
Chipset
Memory Information
Total Memory
4096 MB (DDR3)
DIMM1
4096 MB (DDR3)
DIMM2
Not Present
---------------------
ÆÅ
: Select Screen
↑
↓
: Select Item
Enter: Select
+/-: Change Opt.
F1: General
Help
F2: Previous
Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
Version 2.17.1246. Copyright (C) 2015 American Megatrends, Inc.
BIOS Menu 20: Memory Configuration
5.4.2 PCH-IO Configuration
Use the
PCH-IO Configuration
) to configure the PCH parameters.
Aptio Setup Utility – Copyright (C) 2015 American Megatrends, Inc.
Chipset
Auto Power Button Function
[Disabled(ATX)]
Restore AC Power Loss
[Last State]
> PCI Express Configuration
> PCH Azalia Configuration
Power Saving Function(EUP)
[Disabled]
Select AC power state
when power is re-applied
after a power failure.
---------------------
ÆÅ
: Select Screen
↑
↓
: Select Item
Enter: Select
+/-: Change Opt.
F1: General
Help
F2: Previous
Values
F3: Optimized
Defaults
F4: Save & Exit
ESC: Exit
Version 2.17.1246. Copyright (C) 2015 American Megatrends, Inc.
BIOS Menu 21: PCH-IO Configuration
Summary of Contents for WAFER-ULT-i1
Page 9: ...WAFER ULT ULT2 i1 3 5 SBC Page ix E WATCHDOG TIMER 144 F HAZARDOUS MATERIALS DISCLOSURE 147...
Page 16: ...WAFER ULT ULT2 i1 3 5 SBC Page 1 Chapter 1 1 Introduction...
Page 21: ...WAFER ULT ULT2 i1 3 5 SBC Page 6 Figure 1 3 WAFER ULT ULT2 i1 Dimensions mm...
Page 26: ...WAFER ULT ULT2 i1 3 5 SBC Page 11 Chapter 2 2 Packing List...
Page 31: ...WAFER ULT ULT2 i1 3 5 SBC Page 16 Chapter 3 3 Connectors...
Page 64: ...WAFER ULT ULT2 i1 3 5 SBC Page 49 Chapter 4 4 Installation...
Page 88: ...WAFER ULT ULT2 i1 3 5 SBC Page 73 Chapter 5 5 BIOS...
Page 127: ...WAFER ULT ULT2 i1 3 5 SBC Page 112 6 Software Drivers Chapter 6...
Page 147: ...WAFER ULT ULT2 i1 3 5 SBC Page 132 Appendix A A Regulatory Compliance...
Page 149: ...WAFER ULT ULT2 i1 3 5 SBC Page 134 Appendix B B BIOS Options...
Page 152: ...WAFER ULT ULT2 i1 3 5 SBC Page 137 Appendix C C Terminology...
Page 156: ...WAFER ULT ULT2 i1 3 5 SBC Page 141 Appendix D D Digital I O Interface...
Page 159: ...WAFER ULT ULT2 i1 3 5 SBC Page 144 Appendix E E Watchdog Timer...
Page 162: ...WAFER ULT ULT2 i1 3 5 SBC Page 147 Appendix F F Hazardous Materials Disclosure...