WAFER-ULT/ULT2-i1 3.5" SBC
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Figure 3-28: USB 2.0 Connector Location
Pin Description Pin Description
1 USB_VCC 2 GND
3 DATA-
4 DATA+
5 DATA+
6 DATA-
7 GND
8 USB_VCC
Table 3-28: USB 2.0 Connector Pinouts
3.3 External Interface Connectors
The figure below shows the external peripheral interface connector (EPIC) panel. The
EPIC panel consists of the following:
Figure 3-29: External Interface Connectors
Summary of Contents for WAFER-ULT-i1
Page 9: ...WAFER ULT ULT2 i1 3 5 SBC Page ix E WATCHDOG TIMER 144 F HAZARDOUS MATERIALS DISCLOSURE 147...
Page 16: ...WAFER ULT ULT2 i1 3 5 SBC Page 1 Chapter 1 1 Introduction...
Page 21: ...WAFER ULT ULT2 i1 3 5 SBC Page 6 Figure 1 3 WAFER ULT ULT2 i1 Dimensions mm...
Page 26: ...WAFER ULT ULT2 i1 3 5 SBC Page 11 Chapter 2 2 Packing List...
Page 31: ...WAFER ULT ULT2 i1 3 5 SBC Page 16 Chapter 3 3 Connectors...
Page 64: ...WAFER ULT ULT2 i1 3 5 SBC Page 49 Chapter 4 4 Installation...
Page 88: ...WAFER ULT ULT2 i1 3 5 SBC Page 73 Chapter 5 5 BIOS...
Page 127: ...WAFER ULT ULT2 i1 3 5 SBC Page 112 6 Software Drivers Chapter 6...
Page 147: ...WAFER ULT ULT2 i1 3 5 SBC Page 132 Appendix A A Regulatory Compliance...
Page 149: ...WAFER ULT ULT2 i1 3 5 SBC Page 134 Appendix B B BIOS Options...
Page 152: ...WAFER ULT ULT2 i1 3 5 SBC Page 137 Appendix C C Terminology...
Page 156: ...WAFER ULT ULT2 i1 3 5 SBC Page 141 Appendix D D Digital I O Interface...
Page 159: ...WAFER ULT ULT2 i1 3 5 SBC Page 144 Appendix E E Watchdog Timer...
Page 162: ...WAFER ULT ULT2 i1 3 5 SBC Page 147 Appendix F F Hazardous Materials Disclosure...