WAFER-ULT5 SBC
Page 64
5.3.1 CPU Configuration
Use the
CPU Configuration
menu (
) to view detailed CPU specifications
and configure the CPU.
Aptio Setup Utility – Copyright (C) 2019 American Megatrends, Inc.
Advanced
CPU Configuration
Type
Intel(R) Core(TM)
i7-8665UE CPU@
1.70GHz
ID
0x806EC
Speed
2000 MHz
L1 Data Cache
32 KB x 4
L1 Instruction Cache
32 KB x 4
L2 Cache
256 KB x 4
L3 Cache
8 MB
L4 Cache
N/A
VMX
Supported
SMX/TXT
Not Supported
Intel (VMX) Virtualization
[Disabled]
Technology
Active Processor Cores
[All]
Hyper-Threading
[Enabled]
Intel(R) SpeedStep(tm)
[Enabled]
C states
[Disabled]
Intel Trusted Execution
[Disabled]
Technology
When enabled, a VMM can
utilize the additional
hardware capabilities
provided by Vanderpool
Technology.
----------------------
: Select Screen
↑
↓
: Select Item
Enter
Select
F1
General Help
F2
Previous Values
F3
Optimized Defaults
F4
Save
ESC
Exit
Version 2.20.1271. Copyright (C) 2019 American Megatrends, Inc.
BIOS Menu 3: CPU Configuration
Intel
®
(VMX) Virtualization Technology [Disabled]
Use the
Intel
®
(VMX) Virtualization Technology
option to enable or disable virtualization
on the system. When combined with third party software, Intel
®
Virtualization technology
allows several OSs to run on the same system at the same time.
Disabled
D
EFAULT
Disables Intel
®
Virtualization Technology.
Enabled
Enables Intel
®
Virtualization Technology.
Summary of Contents for WAFER-ULT5
Page 13: ...WAFER ULT5 SBC Page 1 Chapter 1 1 Introduction...
Page 21: ...WAFER ULT5 SBC Page 9 Chapter 2 2 Unpacking...
Page 25: ...WAFER ULT5 SBC Page 13 Chapter 3 3 Connectors...
Page 54: ...WAFER ULT5 SBC Page 42 Chapter 4 4 Installation...
Page 71: ...WAFER ULT5 SBC Page 59 Chapter 5 5 BIOS...
Page 109: ...WAFER ULT5 SBC Page 97 Chapter 6 6 Software Drivers...
Page 112: ...WAFER ULT5 SBC Page 100 Appendix A A Regulatory Compliance...
Page 114: ...WAFER ULT5 SBC Page 102 B Product Disposal Appendix B...
Page 116: ...WAFER ULT5 SBC Page 104 Appendix C C BIOS Menu Options...
Page 119: ...WAFER ULT5 SBC Page 107 Appendix D D Digital I O Interface...
Page 122: ...WAFER ULT5 SBC Page 110 Appendix E E Watchdog Timer...
Page 125: ...WAFER ULT5 SBC Page 113 Appendix F F Error Beep Code...
Page 127: ...WAFER ULT5 SBC Page 115 Appendix G G Hazardous Materials Disclosure...