background image

 

 

WAFER-ULT5 SBC 

 

Page 79 

 

Stop Bits [1] 

Use the 

Stop Bits

 option to specify the number of stop bits used to indicate the end of a 

serial data packet. Communication with slow devices may require more than 1 stop bit. 

 

D

EFAULT

 

Sets the number of stop bits at 1. 

 

 

Sets the number of stop bits at 2. 

5.3.8 USB Configuration 

Use the 

USB Configuration

  menu (

BIOS Menu 15

) to read USB configuration 

information and configure the USB settings. 

Aptio Setup Utility – Copyright (C) 2019 American Megatrends, Inc. 

 

Advanced 

 

 

 

 

 

 

 

USB Configuration 
 
USB Controllers: 
        1 XHCI 
USB Devices: 
        1 Keyboard 

 
Legacy USB Support 

[Enabled] 

 
 
 

 
Enables Legacy USB 
support. AUTO option 
disables legacy support 
if no USB devices are 
connected. DISABLE 
option will keep USB 
devices available only 
for EFI applications. 
 
--------------------- 



: Select Screen 

 

: Select Item 

Enter 

Select 

F1 

General Help 

F2 

Previous Values 

F3 

Optimized 

Defaults 
F4 

Save  

ESC 

Exit 

Version 2.20.1271. Copyright (C) 2019 American Megatrends, Inc. 

BIOS Menu 15: USB Configuration

 

 

USB Devices 

The 

USB Devices Enabled

 field lists the USB devices that are enabled on the system 

Summary of Contents for WAFER-ULT5

Page 1: ...Manual WAFER ULT5 MODEL 3 5 SBC with 14nm Intel Core i7 i5 i3 or Celeron On board SoC LVDS HDMI Triple PCIe GbE USB 3 2 Gen 2 M 2 PCIe Mini SATA 6Gb s RS 232 422 485 Audio and RoHS Rev 1 02 September...

Page 2: ...FER ULT5 SBC Page II Revision Date Version Changes September 28 2020 1 02 Modified Appendix D August 6 2020 1 01 Clarified the LVDS connector pinouts Section 3 2 7 December 30 2019 1 00 Initial releas...

Page 3: ...ising out of the use or inability to use the product or documentation even if advised of the possibility of such damages This document contains proprietary information protected by copyright All right...

Page 4: ...ry Warnings should be taken seriously CAUTION Cautionary messages should be heeded to help reduce the chance of losing data or damaging the product NOTE These messages inform the reader of essential b...

Page 5: ...TEMS 12 3 CONNECTORS 13 3 1 PERIPHERAL INTERFACE CONNECTORS 14 3 1 1 WAFER ULT5 Layout 14 3 1 2 Peripheral Interface Connectors 14 3 1 3 External Interface Panel Connectors 15 3 2 INTERNAL PERIPHERAL...

Page 6: ...2 LAN Connectors 40 3 3 3 USB 3 2 Gen 2 Connectors 41 4 INSTALLATION 42 4 1 ANTI STATIC PRECAUTIONS 43 4 2 INSTALLATION CONSIDERATIONS 43 4 3 SO DIMM INSTALLATION 45 4 4 M 2 MODULE INSTALLATION 46 4 5...

Page 7: ...an Mode Configuration 71 5 3 6 F81866 Super IO Configuration 73 5 3 6 1 Serial Port n Configuration 74 5 3 7 Serial Port Console Redirection 75 5 3 7 1 Legacy Console Redirection Settings 76 5 3 7 2 C...

Page 8: ...OWNLOAD 98 A REGULATORY COMPLIANCE 100 B PRODUCT DISPOSAL 102 C BIOS MENU OPTIONS 104 D DIGITAL I O INTERFACE 107 E WATCHDOG TIMER 110 F ERROR BEEP CODE 113 F 1 PEI BEEP CODES 114 F 2 DXE BEEP CODES 1...

Page 9: ...igure 3 13 DDR4 SO DIMM Socket Location 26 Figure 3 14 Full size PCIe Mini Card Slot Location 26 Figure 3 15 12V DC IN Power Connector Location 28 Figure 3 16 Power Button Connector Location 29 Figure...

Page 10: ...tch 48 Figure 4 11 Clear CMOS Button Location 49 Figure 4 13 Flash Descriptor Security Override Jumper Location 50 Figure 4 14 LCD Voltage Selection Jumper Location 51 Figure 4 16 Heat Sink Retention...

Page 11: ...5 Table 3 14 Full size PCIe Mini Card Slot Pinouts 27 Table 3 15 12V DC IN Power Connector Pinouts 28 Table 3 16 Power Button Connector Pinouts 29 Table 3 17 Reset Button Connector Pinouts 30 Table 3...

Page 12: ...S Menu 12 Serial Port Console Redirection 75 BIOS Menu 13 Legacy Console Redirection Settings 76 BIOS Menu 14 Console Redirection Settings 77 BIOS Menu 15 USB Configuration 79 BIOS Menu 17 NVMe Config...

Page 13: ...WAFER ULT5 SBC Page 1 Chapter 1 1 Introduction...

Page 14: ...s includes two HDMI connectors and an 18 24 bit LVDS connector for triple independent display Expansion and I O include one full size PCIe Mini slot supporting mSATA modules one M 2 A key slot for exp...

Page 15: ...LT5 CE Intel Celeron 4205U on board SoC 1 8 GHz dual core 2 MB cache TDP 15 W Table 1 1 WAFER ULT5 Model Variations 1 3 Features Some of the WAFER ULT5 motherboard features are listed below 3 5 SBC wi...

Page 16: ...WAFER ULT5 SBC Page 4 1 4 Connectors The connectors on the WAFER ULT5 are shown in the figure below Figure 1 2 Connectors...

Page 17: ...WAFER ULT5 SBC Page 5 1 5 Dimensions The dimensions of the board are listed below Figure 1 3 Dimensions mm...

Page 18: ...WAFER ULT5 SBC Page 6 1 6 Data Flow Figure 1 4 shows the data flow between the system chipset the CPU and other components installed on the motherboard Figure 1 4 Data Flow Diagram...

Page 19: ...B cache TDP 15 W Intel Celeron 4205U on board SoC 1 8 GHz dual core 2 MB cache TDP 15 W BIOS AMI UEFI BIOS Memory One 260 pin 2400 MHz dual channel DDR4 SO DIMM slots system max 32 GB Graphics Intel U...

Page 20: ...1 x Smart fan connector by 4 pin 1x4 wafer SMBus I2 C 1 x SMBus I2 C connector by 4 pin 1x4 wafer Storage 1 x SATA 6Gb s with 5 V SATA power connectors Expansions 1 x M 2 2230 A key slot USB 2 0 PCIe...

Page 21: ...WAFER ULT5 SBC Page 9 Chapter 2 2 Unpacking...

Page 22: ...charge Self grounding Touch a grounded conductor every few minutes to discharge any excess static buildup Use an anti static pad When configuring any circuit board place it on an anti static mat Only...

Page 23: ...I reseller or vendor the WAFER ULT5 was purchased from or contact an IEI sales representative directly by sending an email to sales ieiworld com The WAFER ULT5 is shipped with the following components...

Page 24: ...ge 12 2 4 Optional Items The following are optional components which may be separately purchased Item and Part Number Image RS 232 cable 250 mm p 1 25 P N 32005 003500 200 RS Audio kit 7 1 Channel P N...

Page 25: ...WAFER ULT5 SBC Page 13 Chapter 3 3 Connectors...

Page 26: ...below show all the connectors and jumpers Figure 3 1 Connector and Jumper Locations 3 1 2 Peripheral Interface Connectors The table below lists all the connectors on the board Connector Type Label Au...

Page 27: ...er button connector 2 pin wafer PWR_BTN1 Reset button connector 2 pin wafer RST_BTN1 RS 232 serial port connector 9 pin wafer COM2 RS 232 422 485 serial port connector 9 pin wafer COM1 Serial ATA conn...

Page 28: ...CN Type 10 pin header p 2 00 mm CN Location See Figure 3 2 CN Pinouts See Table 3 3 The audio connector is connected to external audio devices including speakers and microphones for the input and outp...

Page 29: ...uctions and local regulations NOTE It is recommended to attach the RTC battery onto the system chassis in which the WAFER ULT5 is installed CN Label BAT1 CN Type 2 pin wafer p 1 25 mm CN Location See...

Page 30: ...er p 1 25 mm CN Location See Figure 3 4 CN Pinouts See Table 3 5 The 8 bit digital I O connector provides programmable input and output for external devices Figure 3 4 Digital I O Connector Location P...

Page 31: ...Type 4 pin wafer p 2 54 mm CN Location See Figure 3 5 CN Pinouts See Table 3 6 The fan connector attaches to a smart cooling fan Figure 3 5 Fan Connector Location Pin Description 1 GND 2 12V 3 Rotati...

Page 32: ...ation See Figure 3 6 CN Pinouts See Table 3 7 The front panel connector connects to the power LED indicator and HDD LED indicator on the system front panel Figure 3 6 Front Panel Connector Location Pi...

Page 33: ...ble 3 8 The LAN LED connectors connect to the LAN link LEDs on the system Figure 3 7 LAN LED Connector Locations Pin Description 1 LED 2 LED Table 3 8 LAN LED Connector Pinouts 3 2 7 LVDS LCD Connecto...

Page 34: ...ROUND 2 GROUND 3 LVDS_A_TX0 N 4 LVDS_A_TX1 N 5 LVDS_A_TX0 P 6 LVDS_A_TX1 P 7 GROUND 8 GROUND 9 LVDS_A_TX2 N 10 LVDS_A_TXCLK N 11 LVDS_A_TX2 P 12 LVDS_A_TXCLK P 13 GROUND 14 GROUND 15 LVDS_A_TX3 N 16 L...

Page 35: ...3 9 LVDS Connector Pinouts 3 2 8 LVDS Backlight Inverter Connector CN Label INV1 CN Type 5 pin wafer p 2 00 mm CN Location See Figure 3 9 CN Pinouts See Table 3 10 The backlight inverter connector pr...

Page 36: ...30 size of M 2 modules The M 2 slot supports PCIe x2 and USB 2 0 signals Figure 3 10 M 2 A key Slot Location Pin Description Pin Description 1 GND 2 V3 3A 3 USB 4 V3 3A 5 USB 6 NC 7 GND 8 Module Key 9...

Page 37: ...43 PCIE_RX0 44 NC 45 GND 46 NC 47 CLK_PCIE0 48 NC 49 CLK_PCIE0 50 NC 51 GND 52 BUF_PLT_RST 53 PCIE_CLKREQ 54 Pull Up V3 3A 55 PCIE_WAKE 56 Pull Up V3 3A 57 GND 58 NC 59 PCIE_TX1 60 NC 61 PCIE_TX1 62 N...

Page 38: ...ling the DDR4 SO DIMM Figure 3 11 DDR4 SO DIMM Socket Location 3 2 11 PCIe Mini Card Slot Full size CN Label MINI_PCIE1 CN Type Full size PCIe Mini card slot CN Location See Figure 3 12 CN Pinouts See...

Page 39: ...N C 15 GND 16 N C 17 N C 18 GND 19 N C 20 N C 21 GND 22 PCIRST 23 PCIE_RXN 24 N C 25 PCIE_RXP 26 GND 27 GND 28 1 5V 29 GND 30 SMBCLK 31 PCIE_TXN 32 SMBDATA 33 PCIE_TXP 34 GND 35 GND 36 USBD 37 GND 38...

Page 40: ...pin Molex p 4 2 mm CN Location See Figure 3 13 CN Pinouts See Table 3 13 The connector supports the 12V power supply Figure 3 13 12V DC IN Power Connector Location PIN NO DESCRIPTION PIN NO DESCRIPTIO...

Page 41: ...CN Location See Figure 3 14 CN Pinouts See Table 3 14 The power button connector is connected to a power switch on the system chassis to enable users to turn the system on and off Figure 3 14 Power Bu...

Page 42: ...ion See Figure 3 15 CN Pinouts See Table 3 15 The reset button connector is connected to a reset switch on the system chassis to enable users to reboot the system when the system is turned on Figure 3...

Page 43: ...25 mm CN Location See Figure 3 16 CN Pinouts See Table 3 16 The serial connector provides RS 232 connection Figure 3 16 RS 232 Serial Port Connector Location PIN NO DESCRIPTION PIN NO DESCRIPTION 1 DC...

Page 44: ...232 To configure the connectors as RS 422 or RS 485 please refer to Section 5 3 6 1 Figure 3 17 RS 232 422 485 Connector Location Pin RS 232 RS 422 RS 485 1 DCD TXD DATA 2 DSR N A N A 3 RXD TXD DATA...

Page 45: ...CTS 9 RI Table 3 18 DB 9 RS 232 422 485 Pinouts 3 2 17 SATA 6Gb s Drive Connector CN Label SATA1 CN Type 7 pin SATA connector CN Location See Figure 3 18 The SATA 6Gb s drive connector is connected t...

Page 46: ...1 CN Type 2 pin wafer p 2 00 mm CN Location See Figure 3 19 CN Pinouts See Table 3 19 The SATA power connector provides 5 V power output to the SATA connector Figure 3 19 SATA Power Connector Location...

Page 47: ...25 mm CN Location See Figure 3 20 CN Pinouts See Table 3 20 The SMBus System Management Bus connector provides low speed system management communications Figure 3 20 SMBus Connector Location Pin Desc...

Page 48: ...er p 1 25 mm CN Location See Figure 3 21 CN Pinouts See Table 3 21 The 6 pin SPI Flash connector is used to flash the BIOS Figure 3 21 SPI Flash Connector Location Pin Description 1 3 3V 2 SPI_CS _SW...

Page 49: ...00 mm CN Location See Figure 3 22 CN Pinouts See Table 3 22 The USB connector provides two USB 2 0 ports by dual port USB cable Figure 3 22 USB Connector Location PIN NO DESCRIPTION PIN NO DESCRIPTIO...

Page 50: ...nector Panel Figure 3 23 shows the WAFER ULT5 external peripheral interface connector EPIC panel The EPIC panel consists of the following 2 x HDMI connector 3 x GbE RJ 45 connector 4 x USB 3 2 Gen 2 c...

Page 51: ...4 The HDMI connectors can connect to HDMI devices Pin Description Pin Description 1 HDMI_DATA2 2 GND 3 HDMI_DATA2 4 HDMI_DATA1 5 GND 6 HDMI_DATA1 7 HDMI_DATA0 8 GND 9 HDMI_DATA0 10 HDMI_CLK 11 GND 12...

Page 52: ...4 The LAN connector connects to a local network Pin Description Pin Description 1 MDIA0 5 MDIA2 2 MDIA0 6 MDIA1 3 MDIA1 7 MDIA3 4 MDIA2 8 MDIA3 Table 3 24 LAN Pinouts Figure 3 25 LAN Connector LED Des...

Page 53: ...s The USB connector can be connected to a USB 2 0 or USB 3 2 device The pinouts of USB 3 2 Gen 2 connectors are shown below Pin Description Pin Description 1 USB_VCC 2 USB2_D0 3 USB2_D0 4 GND 5 USB3_R...

Page 54: ...WAFER ULT5 SBC Page 42 Chapter 4 4 Installation...

Page 55: ...can help to prevent ESD from damaging the board Self grounding Before handling the board touch any grounded conducting material During the time the board is handled frequently touch any conducting mat...

Page 56: ...D from the body and helps prevent ESD damage Place the WAFER ULT5 on an antistatic pad o When installing or configuring the motherboard place it on an antistatic pad This helps to prevent potential ES...

Page 57: ...2 Align the SO DIMM with the socket Align the notch on the memory with the notch on the memory socket Step 3 Insert the SO DIMM Push the memory in at a 20 angle See Figure 4 1 Step 4 Seat the SO DIMM...

Page 58: ...the retention screw secured on the motherboard Step 3 Line up the notch on the module with the notch on the slot Slide the M 2 module into the socket at an angle of about 20 Figure 4 5 Figure 4 2 Ins...

Page 59: ...the retention screw as shown in Figure 4 4 Figure 4 4 Removing the Retention Screw Step 3 Line up the notch on the card with the notch on the slot Slide the PCIe Mini card into the socket at an angle...

Page 60: ...is controlled by buttons jumpers and switches The system configuration should be performed before installation 4 6 1 AT ATX Mode Select Switch The AT ATX mode select switch specifies the systems powe...

Page 61: ...Button CN Location See Figure 4 8 If the WAFER ULT5 fails to boot due to improper BIOS settings use the button to clear the CMOS data and reset the system BIOS information The location of the clear C...

Page 62: ...r location and settings Setting Description Open Disabled Default Short Enabled Table 4 1 Flash Descriptor Security Override Jumper Settings Figure 4 9 Flash Descriptor Security Override Jumper Locati...

Page 63: ...to select a voltage that matches the voltage required by the LCD panel CN Label JP1 CN Type 3 pin header p 1 27 mm CN Location See Figure 4 10 CN Settings See Table 4 2 The LCD voltage selection jumpe...

Page 64: ...thout the heat spreader secured to the board When the WAFER ULT5 is shipped it is secured to a heat spreader with five retention screws The heat spreader must have a direct contact with a heat dissipa...

Page 65: ...s several screw holes allowing the WAFER ULT5 to be mounted into a chassis or a heat sink enclosure please refer to Figure 1 3 for the detailed dimensions The user has to design or select a chassis or...

Page 66: ...n AT power supply WARNING Disconnect the power supply power cord from its AC power source to prevent a sudden power surge to the WAFER ULT5 Step 1 Locate the power cable The power cable is shown in th...

Page 67: ...em must be ordered separately and connects to the audio connector For further information please contact the nearest distributor reseller or vendor or contact an IEI sales representative directly The...

Page 68: ...ect the audio devices Connect speakers and external audio sources to the audio jacks on the audio kit Step 5 Install the driver Install the 7 1 channel audio driver included with the board Step 0 4 8...

Page 69: ...r bracket Step 4 Connect the serial device Once the single RS 232 connector is connected to a chassis or bracket a serial communications device can be connected to the system Step 0 4 8 4 SATA Drive C...

Page 70: ...Connect the cable to the SATA disk Connect the connector on the other end of the cable to the connector at the back of the SATA drive See Figure 4 17 Step 4 To remove the SATA cable from the SATA con...

Page 71: ...WAFER ULT5 SBC Page 59 Chapter 5 5 BIOS...

Page 72: ...the DELETE or F2 key as soon as the system is turned on or 2 Press the DELETE or F2 key when the Press Del to enter SETUP message appears on the screen 0 If the message disappears before the DELETE or...

Page 73: ...appears To exit the Help Window press ESC or the F1 key again 5 1 4 Unable to Reboot after Configuration Changes If the computer cannot boot after changes to the system configuration is made CMOS defa...

Page 74: ...MHz ID 0x806EC Stepping V0 Number of Processors 4Core s 8Thread s Microcode Revision CA GT Info GT2 0x3EA0 IGFX VBIOS Version 1017 Memory RC Version 0 7 1 95 Total Memory 8192 MB Memory Frequency 2133...

Page 75: ...w may cause the system to malfunction Make sure that the settings made are compatible with the hardware Aptio Setup Utility Copyright C 2019 American Megatrends Inc Main Advanced Chipset Security Boot...

Page 76: ...Enabled C states Disabled Intel Trusted Execution Disabled Technology When enabled a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology Select Screen Select Item E...

Page 77: ...e the Hyper threading BIOS option to enable or disable the Intel Hyper Threading Technology Disabled Disables the Intel Hyper Threading Technology Enabled DEFAULT Enables the Intel Hyper Threading Tec...

Page 78: ...is option does not disable Manageability Features in FW Select Screen Select Item EnterSelect F1 General Help F2 Previous Values F3 Optimized Defaults F4 Save ESC Exit Version 2 20 1271 Copyright C 20...

Page 79: ...dTPM PTT Enables PTT in SkuMgr dTPM 1 2 Disables PTT in SkuMgr Warning PTT dTPM will be disabled and all data saved on it will be lost Select Screen Select Item EnterSelect F1 General Help F2 Previous...

Page 80: ...tton is pressed Select Screen Select Item EnterSelect Change Opt F1 General Help F2 Previous Values F3 Optimized Defaults F4 Save Exit ESC Exit Version 2 20 1271 Copyright C 2019 American Megatrends I...

Page 81: ...s Values F3 Optimized Defaults F4 Save ESC Exit Version 2 20 1271 Copyright C 2019 American Megatrends Inc BIOS Menu 7 RTC Wake Settings Wake system with Fixed Time Disabled Use the Wake system with F...

Page 82: ...45 C System temperature 40 C CPU_FAN1 Speed N A VCCCORE 0 785 V VDDQ 1 219 V V1 05A 1 038 V VCCSA 0 756 V 3 3VSB 3 416 V Smart Fan Mode Configuration Smart Fan Mode Select Select Screen Select Item En...

Page 83: ...o mode fan slope PWM 2 Smart Fan Mode Select Select Screen Select Item EnterSelect Change Opt F1 General Help F2 Previous Values F3 Optimized Defaults F4 Save Exit ESC Exit Version 2 20 1271 Copyright...

Page 84: ...30 WARNING Setting this value too high may cause the fan to speed up only when the CPU is at a very high temperature and therefore cause the system to be damaged The Auto mode fan off temperature opt...

Page 85: ...een 1 and 8 5 3 6 F81866 Super IO Configuration Use the F81866 Super IO Configuration menu BIOS Menu 10 to set or change the configurations for the serial ports Aptio Setup Utility Copyright C 2019 Am...

Page 86: ...m EnterSelect F1 General Help F2 Previous Values F3 Optimized Defaults F4 Save ESC Exit Version 2 20 1271 Copyright C 2019 American Megatrends Inc BIOS Menu 11 Serial Port n Configuration Serial Port...

Page 87: ...abled Console Redirection Settings iAMT SOL COM3 Pci Bus0 Dev22 Func3 Console Redirection Disabled Console Redirection Settings Legacy Console Redirection Legacy Console Redirection Settings Console R...

Page 88: ...to display redirection of Legacy OS and Legacy OPROM Messages Select Screen Select Item EnterSelect F1 General Help F2 Previous Values F3 Optimized Defaults F4 Save ESC Exit Version 2 20 1271 Copyrigh...

Page 89: ...nded ASCII char set VT100 ASCII char set VT100 Extends VT100 to support color function keys etc VT UTF8 Uses UTF8 encoding to map Unicode chars onto 1 or more bytes Select Screen Select Item EnterSele...

Page 90: ...115200 Data Bits 8 Use the Data Bits option to specify the number of data bits 7 Sets the data bits at 7 8 DEFAULT Sets the data bits at 8 Parity None Use the Parity option to specify the parity bit...

Page 91: ...Aptio Setup Utility Copyright C 2019 American Megatrends Inc Advanced USB Configuration USB Controllers 1 XHCI USB Devices 1 Keyboard Legacy USB Support Enabled Enables Legacy USB support AUTO option...

Page 92: ...USB driver loaded onto the system Enabled DEFAULT Legacy USB support enabled Disabled Legacy USB support disabled Auto Legacy USB support disabled if no USB devices are connected 5 3 9 NVMe Configura...

Page 93: ...S crashes Please install Auto Recovery API service before enabling this function Select Screen Select Item EnterSelect F1 General Help F2 Previous Values F3 Optimized Defaults F4 Save ESC Exit Version...

Page 94: ...1271 Copyright C 2019 American Megatrends Inc BIOS Menu 18 Chipset 5 4 1 System Agent SA Configuration Use the System Agent SA Configuration menu BIOS Menu 19 to configure the System Agent SA paramet...

Page 95: ...IOS Menu 20 to display the memory information Aptio Setup Utility Copyright C 2019 American Megatrends Inc Chipset Memory Configuration Memory Frequency 2133 MHz DIMM1 Populated Enabled Size 8192 MB D...

Page 96: ...Or select SG for Switchable Gfx Select Screen Select Item EnterSelect Change Opt F1 General Help F2 Previous Values F3 Optimized Defaults F4 Save Exit ESC Exit Version 2 20 1271 Copyright C 2019 Amer...

Page 97: ...em memory allocated can then only be used as graphics memory and is no longer available to applications or the operating system Configuration options are listed below 32M DEFAULT 64M DVMT Total Gfx Me...

Page 98: ...r state when power is re applied after a power failure Select Screen Select Item EnterSelect Change Opt F1 General Help F2 Previous Values F3 Optimized Defaults F4 Save Exit ESC Exit Version 2 20 1271...

Page 99: ...provide power to the USB connectors when the system is in S3 S4 sleep state This option is valid only when the above Power Saving Function ERP BIOS option is disabled 5V DUAL DEFAULT Power is provide...

Page 100: ...mized Defaults F4 Save Exit ESC Exit Version 2 20 1271 Copyright C 2019 American Megatrends Inc BIOS Menu 23 PCI Express Configuration 5 4 2 1 1 MINI_PCIE1 M2_A1 Configuration Aptio Setup Utility Copy...

Page 101: ...CI Express slots The following options are available Auto Default Gen1 Gen2 Gen3 Detect Non Compliance Device Disabled Use the Detect Non Compliance Device option to enable or disable detecting if a n...

Page 102: ...ATA Device Select Screen Select Item EnterSelect F1 General Help F2 Previous Values F3 Optimized Defaults F4 Save ESC Exit Version 2 20 1271 Copyright C 2019 American Megatrends Inc BIOS Menu 25 SATA...

Page 103: ...AFER ULT5 SBC Page 91 Hot Plug Disabled Use the Hot Plug option to enable or disable the SATA device hot plug Disabled DEFAULT Disables the SATA device hot plug Enabled Enables the SATA device hot plu...

Page 104: ...is a power on password and must be entered to boot or enter Setup In Setup the User will have Administrator rights The password length must be Minimum length 3 Maximum length 20 Administrator Passwor...

Page 105: ...Copyright C 2019 American Megatrends Inc BIOS Menu 27 Boot Bootup NumLock State On Use the Bootup NumLock State BIOS option to specify if the number lock setting must be modified during boot up On DE...

Page 106: ...E Option ROMs Option ROM Messages Force BIOS Use the Option ROM Messages option to set the Option ROM display mode Force BIOS DEFAULT Sets display mode to force BIOS Keep Current Sets display mode to...

Page 107: ...Select F1 General Help F2 Previous Values F3 Optimized Defaults F4 Save ESC Exit Version 2 20 1271 Copyright C 2019 American Megatrends Inc BIOS Menu 28 Exit Save Changes and Reset Use the Save Change...

Page 108: ...Save as User Defaults Use the Save as User Defaults option to save the changes done so far as user defaults Restore User Defaults Use the Restore User Defaults option to restore the user defaults to...

Page 109: ...WAFER ULT5 SBC Page 97 Chapter 6 6 Software Drivers...

Page 110: ...ind all the relevant software utilities and documentation Figure 6 1 IEI Resource Download Center 6 2 Driver Download To download drivers from IEI Resource Download Center follow the steps below Step...

Page 111: ...following window You can download the entire ISO file or click the small arrow to find an individual driver and click the file name to download NOTE To install software from the downloaded ISO image f...

Page 112: ...WAFER ULT5 SBC Page 100 Appendix A A Regulatory Compliance...

Page 113: ...ence that may cause undesired operation This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to part 15 of the FCC Rules These limits are designed t...

Page 114: ...WAFER ULT5 SBC Page 102 B Product Disposal Appendix B...

Page 115: ...ied as electronic device in terms of the European Directive 2012 19 EU WEEE and must not be disposed of as domestic garbage EU wide legislation as implemented in each Member State requires that waste...

Page 116: ...WAFER ULT5 SBC Page 104 Appendix C C BIOS Menu Options...

Page 117: ...Health Status 70 CPU_FAN1 Smart Fan Control Auto Mode 71 Auto mode fan start temperature 40 72 Auto mode fan off temperature 30 72 Auto mode fan start PWM 30 72 Auto mode fan slope PWM 2 73 Serial Po...

Page 118: ...Non Compliance Device Disabled 89 STAT Controller s Enabled 90 SATA Mode Selection AHCI 90 Hot Plug Disabled 91 Administrator Password 92 User Password 92 Bootup NumLock State On 93 Quiet Boot Enable...

Page 119: ...WAFER ULT5 SBC Page 107 Appendix D D Digital I O Interface...

Page 120: ...ces or TTL devices Data can be read or written to the selected address to enable the DIO functions NOTE For further information please refer to the datasheet for the Super I O chipset The BIOS interru...

Page 121: ...AH 6FH Sub function AL 9 Set the digital port as OUTPUT BL Digital I O output value Assembly Language Sample 2 MOV AX 6F09H setting the digital port as output MOV BL 09H digital value is 09H INT 15H...

Page 122: ...WAFER ULT5 SBC Page 110 Appendix E E Watchdog Timer...

Page 123: ...H 6FH Sub function AL 2 Sets the Watchdog Timer s period BL Time out value Its unit second is dependent on the item Watchdog Timer unit select in CMOS setup Table E 1 AH 6FH Sub function Call sub func...

Page 124: ...t deactivated the system will automatically restart after the Timer has finished its countdown EXAMPLE PROGRAM INITIAL TIMER PERIOD COUNTER W_LOOP MOV AX 6F02H setting the time out value MOV BL 30 tim...

Page 125: ...WAFER ULT5 SBC Page 113 Appendix F F Error Beep Code...

Page 126: ...found 4 Recovery failed 4 S3 Resume failed 7 Reset PPI is not available F 2 DXE Beep Codes Number of Beeps Description 1 Invalid password 4 Some of the Architectural Protocols are not available 5 No C...

Page 127: ...WAFER ULT5 SBC Page 115 Appendix G G Hazardous Materials Disclosure...

Page 128: ...lybromina ted Diphenyl Ethers PBDE Bis 2 ethylh exyl phthalate DEHP Butyl benzyl phthalate BBP Dibutyl phthalate DBP Diisobutyl phthalate DIBP Housing O O O O O O O O O O Printed Circuit Board O O O O...

Page 129: ...SBC Page 117 G 2 China RoHS RoHS RoHS Pb Hg Cd CR VI PBB PBDE O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O SJ T11364 2014 GB T26572 2011 X SJ T11364 2014 GB T...

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