WAFER-ULT5 SBC
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4.6.2 Clear CMOS Button
CN Label:
J_CMOS1
CN Type:
Button
CN Location:
See
If the WAFER-ULT5 fails to boot due to improper BIOS settings, use the button to clear the
CMOS data and reset the system BIOS information.
The location of the clear CMOS button is shown in
Figure 4-8: Clear CMOS Button Location
Summary of Contents for WAFER-ULT5
Page 13: ...WAFER ULT5 SBC Page 1 Chapter 1 1 Introduction...
Page 21: ...WAFER ULT5 SBC Page 9 Chapter 2 2 Unpacking...
Page 25: ...WAFER ULT5 SBC Page 13 Chapter 3 3 Connectors...
Page 54: ...WAFER ULT5 SBC Page 42 Chapter 4 4 Installation...
Page 71: ...WAFER ULT5 SBC Page 59 Chapter 5 5 BIOS...
Page 109: ...WAFER ULT5 SBC Page 97 Chapter 6 6 Software Drivers...
Page 112: ...WAFER ULT5 SBC Page 100 Appendix A A Regulatory Compliance...
Page 114: ...WAFER ULT5 SBC Page 102 B Product Disposal Appendix B...
Page 116: ...WAFER ULT5 SBC Page 104 Appendix C C BIOS Menu Options...
Page 119: ...WAFER ULT5 SBC Page 107 Appendix D D Digital I O Interface...
Page 122: ...WAFER ULT5 SBC Page 110 Appendix E E Watchdog Timer...
Page 125: ...WAFER ULT5 SBC Page 113 Appendix F F Error Beep Code...
Page 127: ...WAFER ULT5 SBC Page 115 Appendix G G Hazardous Materials Disclosure...