WAFER-ULT5 SBC
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Active Processor Cores [All]
Use the
Active Processor Cores
BIOS option to enable numbers of cores in the
processor package.
All
D
EFAULT
Enable all cores in the processor package.
1
Enable one core in the processor package.
2
Enable two cores in the processor package.
3
Enable three cores in the processor package.
Hyper-threading [Enabled]
Use the
Hyper-threading
BIOS option to enable or disable the Intel Hyper-Threading
Technology.
Disabled
Disables the Intel Hyper-Threading Technology.
Enabled
D
EFAULT
Enables the Intel Hyper-Threading Technology.
Intel
®
SpeedStep™ [Enabled]
Use the
Intel
®
SpeedStep™
option to enable or disable the Intel
®
SpeedStep
Technology.
Disabled
Disables the Intel
®
SpeedStep Technology.
Enabled
D
EFAULT
Enables the Intel
®
SpeedStep Technology.
C State [Disabled]
Use the
C State
option to enable or disable CPU C state.
Disabled
D
EFAULT
Disables CPU C state.
Enabled
Enables CPU C state.
Summary of Contents for WAFER-ULT5
Page 13: ...WAFER ULT5 SBC Page 1 Chapter 1 1 Introduction...
Page 21: ...WAFER ULT5 SBC Page 9 Chapter 2 2 Unpacking...
Page 25: ...WAFER ULT5 SBC Page 13 Chapter 3 3 Connectors...
Page 54: ...WAFER ULT5 SBC Page 42 Chapter 4 4 Installation...
Page 71: ...WAFER ULT5 SBC Page 59 Chapter 5 5 BIOS...
Page 109: ...WAFER ULT5 SBC Page 97 Chapter 6 6 Software Drivers...
Page 112: ...WAFER ULT5 SBC Page 100 Appendix A A Regulatory Compliance...
Page 114: ...WAFER ULT5 SBC Page 102 B Product Disposal Appendix B...
Page 116: ...WAFER ULT5 SBC Page 104 Appendix C C BIOS Menu Options...
Page 119: ...WAFER ULT5 SBC Page 107 Appendix D D Digital I O Interface...
Page 122: ...WAFER ULT5 SBC Page 110 Appendix E E Watchdog Timer...
Page 125: ...WAFER ULT5 SBC Page 113 Appendix F F Error Beep Code...
Page 127: ...WAFER ULT5 SBC Page 115 Appendix G G Hazardous Materials Disclosure...