Interface
Page 95 of 110
Standard Event Status Register
Decimal
Bit
Value
Use
7
128
Power Up Since Last Query
6
64
None
5
32
Command
Error
(Syntax)
4
16
Execution Error (Over Range, etc.)
3
8
None
2
4
Query
Error
1
2
None
0
1
Operation
Complete
This register is read by executing an “*ESR?” command per paragraph 11.5.1.2.2 (except no *).
Note that this is a destructive read. Reading the register clears it. Each bit of the Event register
must be enabled in order to cause the ESB bit of the Status Register to be set. This enabling is
done in the Standard Event Status Enable Register by issuing an ESE command per paragraph
11.5.1.3.
Summary of Contents for 1910
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Page 107: ...Theory Page 103 of 110 Figure 4 4 Detector Circuits Es IL Ex PL PH Voltage Current...
Page 108: ...Page 104 of 110 Theory Figure 4 5 Digital Signal Processor Es Ex CPU DSP A D Vin A Vin B...