CY8CKIT-064S0S2-4343W PSoC 64 Standard Secure – AWS Wi-Fi BT Pioneer Kit Guide, Doc. # 002-30680 Rev. *B
19
Kit Operation
shows the block diagram of the CY8CMOD-064S0S2-4343W Carrier Module.
shows the block diagram of the CYW9-BASE-01 Pioneer Board.
Figure 2-2. Block Diagram of CY8CMOD-064S0S2-4343W (Carrier Module)
Figure 2-3. Block Diagram of CYW9-BASE-01 Pioneer Board
Cypress
PSoC 64 MCU
Oscillator
32.768kHz
Crystals
32.768kHz &
17.2032MHz
CINTA, CINTB
CMOD
Carrier
Module
Footprint
(0.8mm
castellated pads)
RF Switch
UMC
Connector
RF
Matching
Network
UMC
Connector
VDDUSB
VDDx, VDDIOx
CYW4343W
Type 1DX
Module
VBAT
VDDIO
SDIO (6 I/Os)
UART (4 I/Os)
Control (5 I/Os)
77 I/Os
USB
XRES
25 I/Os
3.3V
1.8~3.3V
3.6V
1.8~3.3V
(3.2~4.2V)
Chip
Antenna
USB
(Micro‐B)
KitProg3
(PSoC 5LP)
KitProg3 Mode
Switch & LED
Carrier
Module
10‐pin SWD/
JTAG Header
20‐pin ETM
Header
Reset
Button
microSD Card
Slot
PSoC 64 MCU
I/O Headers
(Arduino)
User LEDs
(RGB, Red,
Orange)
I2C/UART_RX/UART_TX
SWD
SWD
JTAG
TRACE
QSPI NOR
Flash
SWD
JTAG
P5LP_VDD
VTARG
VDDIO0
2 x User
Buttons
2 x CapSense Buttons,
1 x 5‐segment
CapSense Slider
1.8~3.3V
VTARG_REF
UART_RTS
Level
Translator
USB Host & Device
1.8~3.3V
VTARG_REF
VTARG
Monitoring
CYW9‐BASE‐01 Architecture Block Diagram
UART_CTS
Level
Translator
BT_UART TX, RX, CTS, RTS
WL_UART TX, RX, KP_GPIO_0
VDDIO_WL
P5LP_VDD
VDDIO0
I2C EEPROM
QSPI F‐RAM
VDDIO0
Cypress Device
No Load
Loaded Device
Potentiometer
P5LP_VDD
VTARG
VDDA
3.3V, VTARG
KP_VBUS
PSoC 64 MCU
I/O Headers
(Non Arduino)
VDDD
VBACKUP