Data Sheet
101
Rev. 1.00
2017-07-31
TLE9262BQXV33
Fail Outputs
14
Fail Outputs
14.1
Block and Functional Description
Figure 44 Simplified Fail Output Block Diagram for FO1/2 and for FO3/TEST
The fail outputs consist of a failure logic block and three open-drain outputs (FO1, FO2, FO3) with active-low
signalization.
The fail outputs are activated due to following failure conditions:
•
Watchdog trigger failure
(For config 3&4 only after the 2nd watchdog trigger failure and for config 1&2 after
1st watchdog trigger failure)
•
Thermal shutdown TSD2
•
VCC1 short to GND
•
VCC1 overvoltage (only if the SPI bit
VCC1_OV_RST
is set)
•
After 4 consecutive VCC1 undervoltage event (see
Chapter 15.6
for details)
At the same time SBC Fail-Safe Mode is entered (exceptions are watchdog trigger failures depending on
selected
configurations - see
Chapter 5.1.1
).
The fail output activation is signalled in the SPI bit
FAILURE
of the register
DEV_STAT
.
For testing purposes only the Fail Outputs can also be activated via SPI by setting the bit
FO_ON
. This bit is
independent of the FO failure bits. In case that there is no failure condition, the FO outputs can also be turned
off again via SPI, i.e. no successful watchdog trigger is needed.
The entry of SBC Fail-Safe Mode due to a watchdog failure can be configured as described in
Chapter 5.1.1
.
In order to deactivate the fail outputs in SBC Normal Mode the failure conditions must not be present anymore
(e.g. TSD2, VCC1 short circuit, etc) and the bit
FAILURE
needs to be cleared via SPI command.
In case of a watchdog failure the correct procedure to deactivate the fail outputs is:
• a successful WD trigger, i.e.
WD_FAIL
must be cleared
• clearing of the
FAILURE
bit
WD_FAIL
will also be cleared when going to SBC Sleep or SBC Fail-Safe Mode due to another failure (not a WD
failure) or if the watchdog is disabled in SBC Stop Mode
Failure logic
FO1/2
FO3/TEST
5V_int
R
TEST
SBC Init
Mode
Failure Logic
T
test
T
FO_PL
