User Manual | PE11S100X Series Synthesizer
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Figure 9. Normal Lock Detect Window
6.4 Lock Detect with Phase Offset
When operating in fractional mode the linearity of the charge pump and phase detector are more critical
than in integer mode. The phase detector linearity is worse when operated with zero phase offset. Hence
in fractional mode it is necessary to offset the phase of the reference and the VCO at the phase detector.
In such a case, for example with an offset delay, as shown in
, the mean phase of the VCO will
always occur after the reference. The lock detect circuit window can be made more selective with a fixed
offset delay by setting lkd_win_asym_enable and lkd_win_asym_up_select (
<11>). Similarly the
offset can be in advance of the reference by clearing lkd_win_asym_up_select while leaving
lkd_win_asym_enable
<10> set. lkd_win_asym_enable is
<10>, lkd_win_asym_up_
select is
<11>.
Figure 10. Delayed Lock Detect Window
7.0 Register Map
7.1 Reg 00h Chip ID (Read Only) Register
Bit
Type
Name
Default
Description
[23:0]
Ro
Chip ID
581502h Chip ID
