Copyright Innovative Technology Ltd 2008 GA326-6
•
All Inputs are held high to in5V via 10K
Ω
. The input structure is a
NOTES:
•
All outputs are open collector transistors.
CMOS gate with anti-static protection fitted.
Interface logic levels
Logic low
Logic high
Inputs
0V to +0.5V
+3.7 V +12V
Outputs with 2K2
Ω
pull up 0.6V
Pull up voltage of host interface
Maximum Current Sink
50mA per output
Ta
e Logic
.3 SERIAL INTERFACE INPUT AND OUTPUTS
AUTION: THE SERIAL INTERFACES WILL ONLY WORK IF THE RELEVANT INTERFACE
OFTWARE IS CORRECTLY INSTALLED.
ble 6
- Interfac
Levels
5
C
S
Name
Description
Validator TxD
Vend 1
Validator RxD
Inhibit 1
Table 7
- Serial Interface Inputs and Outputs
NV9 Operations Manual 11
Summary of Contents for NV9
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