UM_INAP375R Revision 1.2_A1
Inova Semiconductors Confidential
Page 17 of 37
User Manual
S4
μ
C dip switch for software configuration
Switch
Signal
Description
1
UC_DIP_0
ON = Tri-State
μ
C ports connected to APIX SPI slave and GPIOs
OFF = APIX SPI slave and GPIOs driven from
μ
C (default)
2
UC_DIP_1
ON=1, OFF=0
3
UC_DIP_2
ON=1, OFF=0
4
UC_DIP_3
ON=1, OFF=0
Table 3-16:
μ
C software configuration
S6
μ
C EEPROM Configuration
Switch
Status
Signal
1
ON=1, OFF=0
EEPROM Address - AD0
2
ON=1, OFF=0
EEPROM Address - AD1
3
ON=1, OFF=0
EEPROM Address - AD2
4
ON=1, OFF=0
EEPROM Write Protect
Table 3-17:
μ
C software configuration
Push Buttons
Button
Status
Description
S3
ON
μ
C and Board Hardware Reset
S5
ON=1, OFF=0
Software Trigger
Table 3-18: Push Buttons