Intel
®
Atom™ Processor E660 with Intel
®
Platform Controller Hub EG20T Development Kit
January 2012
User Manual
Document Number: 324213-002
49
Reference Board Summary
4.6.4
PCI Express* x1 Port3
The PCI Express* port 3 link can connect to either two end points via a signal switch
(Pericom PI2PCIE212-D*). The first target device is a x4 PCIe* slot (X10); the second
target device is a PCI Express* Mini Card connector (X8).
This PCIe* signal switch is controlled by slide switch (SW4 - bit 1), see
and
4.7
JTAG Headers
The JTAG headers are used primarily for the microcontroller firmware upgrade and
boundary scan testing.
The Intel
®
Atom™ Processor E660 JTAG chains are daisy chained onto the XDP JTAG
port (J1A1) on the COM Express* module. Jumper (J1B1) allows you to bypass the CPU
or I/O chain,
see
.
The System Management CPLD can be accessed in-system via the JTAG header (J5D5)
shows the JTAG chain on the COM Express*
Module.
Table 18.
JTAG Chain Jumper Options on the COM Express* Module
JTAG Chain
J1B1 Options
CPU and I/O JTAG
1-2, 3-4, 5-6
CPU JTAG only (default)
1-2, 4-6
I/O JTAG only
1-3, 5-6
Figure 16.
JTAG Chain on the COM Express* Module