Quad-Core Intel® Xeon® Processor 5300 Series Datasheet
29
Electrical Specifications
6.
FMB is the flexible motherboard guideline. These guidelines are for estimation purposes only. See
Section 2.13.1
for further details on FMB guidelines.
7.
This specification represents the total current for GTLREF_DATA_MID, GTLREF_DATA_END,
GTLREF_ADD_MID, and GTLREF_ADD_END.
8.
V
TT
must be provided via a separate voltage source and must not be connected to V
CC
. This specification is
measured at the land.
9.
Minimum V
CC
and maximum I
CC
are specified at the maximum processor case temperature (T
CASE
) shown
in
Figure 6-1
.
10. This specification refers to the total reduction of the load line due to VID transitions below the specified
VID.
11. Individual processor VID values may be calibrated during manufacturing such that two devices at the same
frequency may have different VID settings.
12. This specification applies to the VCCPLL land.
13. Baseboard bandwidth is limited to 20 MHz.
14. I
CC_TDC
is the sustained (DC equivalent) current that the processor is capable of drawing indefinitely and
should be used for the voltage regulator temperature assessment. The voltage regulator is responsible for
monitoring its temperature and asserting the necessary signal to inform the processor of a thermal
excursion. Please see the applicable design guidelines for further details. The processor is capable of
drawing I
CC_TDC
indefinitely. Refer to
Figure 2-2
and
Figure 2-3
for further details on the average processor
current draw over various time durations. This parameter is based on design characterization and is not
tested.
15. This is the maximum total current drawn from the V
TT
plane by only one processor with R
TT
enabled. This
specification does not include the current coming from on-board termination (R
TT
), through the signal line.
Refer to the appropriate platform design guide and the Voltage Regulator Design Guidelines to determine
the total I
TT
drawn by the system. This parameter is based on design characterization and is not tested.
16. I
CC
_
VTT
_
OUT
is specified at 1.2 V.
17. I
CC_RESET
is specified while PWRGOOD and RESET# are asserted.
.
Notes:
1.
Processor or voltage regulator thermal protection circuitry should not trip for load currents greater than
I
CC_TDC
.
2.
Not 100% tested. Specified by design characterization.
Figure 2-2. Quad-Core Intel® Xeon® Processor E5300 Series Load Current versus Time
6 0
6 5
70
75
8 0
8 5
9 0
9 5
10 0
0 . 0 1
0 . 1
1
10
10 0
10 0 0
Tim e Duration (s)
S
u
s
ta
ine
d C
u
rr
e
nt
(
A
)
Summary of Contents for E5345 - Xeon 2.33 GHz 8M L2 Cache 1333MHz FSB LGA771 Active Quad-Core Processor
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