Intel® Server Chassis SC1400UP / Intel® Server Platform SR1425BK1-E
Revision 1.0
- 61 -
6.27 Ripple / Noise
The maximum allowed ripple/noise output of the power supply is defined in
Table 36. Ripple and
Noise
below. This is measured over a bandwidth of 0Hz to 20MHz at the power supply output
connectors. A 10
µ
F tantalum capacitor in parallel with a 0.1
µ
F ceramic capacitor are placed at
the point of measurement.
Table 36. Ripple and Noise
+3.3V
+5V +12V -12V +5VSB
50mVp-p 60mVp-p 120mVp-p 250mVp-p 60mVp-p
6.28 Soft Starting
The Power Supply shall contain control circuit which provides monotonic soft start for its outputs
without overstress of the AC line or any power supply components at any specified AC line or
load conditions. There is no requirement for rise time on the 5Vstby but the turn on/off shall be
monotonic.
6.29 Zero Load Stability Requirements
When the power subsystem operates in a no load condition, it does not need to meet the output
regulation specification, but it must operate without any tripping of over-voltage or other fault
circuitry. When the power subsystem is subsequently loaded, it must begin to regulate and
source current without fault. Each output voltage may not be internally diode isolated. At the
same time failure in the primary side of one power supply doesn’t cause the other to shut down.
6.30 Timing Requirements
These are the timing requirements for the power supply operation. The output voltages must
rise from 10% to within regulation limits (T
vout_rise
) within 5 to 70ms, except for 5VSB - it is
allowed to rise from 1.0 to 70ms. The +3.3V, +5V and +12V output voltages should start to rise
approximately at the same time
. All outputs must rise monotonically
. The +5V output needs
to be greater than the +3.3V output during any point of the voltage rise. The +5V output must
never be greater than the +3.3V output by more than 2.25V. Each output voltage shall reach
regulation within 50ms (T
vout_on
) of each other during turn on of the power supply. Each output
voltage shall fall out of regulation within 400msec (T
vout_off
) of each other during turn off. Refer to
Figure 36. Output
Voltage Timing.
Figure 37. Turn On/Off Timing
shows the timing
requirements for the power supply being turned on and off via the AC input, with PSON held low
and the PSON signal, with the AC input applied.
Table 37. Output Voltage Timing
Item Description
MIN MAX UNITS
T
vout_rise
Output voltage rise time from each main output.
5.0 *
70 *
msec
T
vout_on
All main outputs must be within regulation of each
other within this time.
50
msec
T
vout_off
All main outputs must leave regulation within this
time.
400
msec
•
The 5VSB output voltage rise time shall be from 1.0ms to 25.0ms