Functional Architecture
Intel® Server Board SE7520AF2 TPS
54
Revision
1.2
Intel order number C77866-003
Table 12. PXH P64-A Arbitration Connections
Baseboard Signals
Device
PXH_PAREQ0*/PXH_PAGNT0*
Slot 5 (PCI-X 64/133)
3.4.1.2.4
PXH P64-B Arbitration
The PXH P64-B bus segment supports the on-board Intel® 82546GB 10/100/1000 Dual Gigabit
Ethernet controller and the PCI expansion Slot 6 (PCI-X 64/100), or Slot 6 and Slot 7 in the
event of a two-slot riser. All PCI masters must arbitrate for PCI access, using resources
supplied by the PXH. The host bridge PCI interface arbitration lines PBREQx* and PBGNTx*
are a special case in that they are internal to the host bridge. The following table defines the
arbitration connections.
Table 13. PHX P64-B Arbitration Connections
Baseboard Signals
Device
PXH_PBREQ0*/PXH_PBGNT0* Intel®
10/100/1000 82546GB Dual Gigabit Ethernet controller
PXH_PBREQ1*/PXH_PBGNT1*
Slot 6 (PCI-X 64/100)
PXH_PBREQ1*/PXH_PBGNT1*
Slot 6 (Upper slot of optional 2-slot riser)
PXH_PBREQ2*/PXH_PBGNT2*
Slot 7 (Lower slot of optional 2-slot riser)
3.4.1.3
IOP332 P64-A and P64-B: 64-bit, 133-MHz PCI Subsystem
The two peer 64-bit PCI-X bus segments are directed through the IOP332 I/O bridge. The first
PCI-X segment, P64-A, supports the interface to the on-board LSI Logic* 53C1030 U320 Dual
Channel SCSI controller. The second PCI-X segment, P64-B, supports the interface for the PCI
expansion Slot 1 (PCI-X 64/133).
3.4.1.3.1
Device IDs (IDSEL)
Each device under the IOP332 has its IDSEL signal connected to one bit of AD[31:16], which
acts as a chip select on the PCI bus segment in configuration cycles. This determines a unique
PCI device ID value for use in configuration cycles. The following tables show the bit to which
each IDSEL signal is attached for IOP332 P64-A/P64-B devices and corresponding device
description.
Table 14. IOP332 P64-A Configuration IDs
IDSEL Value
Device
21
LSI Logic* 53C1030 U320 SCSI controller