PEX-400111
7.3.2 Limitations on the Serial Interface Bit Rate Generator Programming
The PEX-400111 supports seven base clock frequencies (8.192 MHz, 12.288 MHz, 14.7456 MHz,
19.6608 MHz, 32 MHz, 49.152 MHz, and 58.9824 MHz) to generate the transmit/receive clock. This
feature allows you to use various transfer rates. The device driver selects a proper clock at the
initialization. Sixteen times of a selected transfer rate is required for the input clock. When a transfer rate
is 9600 bps, the input clock requires 153600 Hz and is produced by dividing the base clock frequency.
Where
BaseClk
is a base clock frequency (Hz) and
BitRate
is a transfer rate (bps),
Divisor
is a divisor
obtained by the following equation:
Divisor
=
BaseClk
(
BitRate
×
16)
.
Select one of base clock frequencies from 8192000 Hz, 12288000 Hz, 14745600 Hz, 19660800 Hz,
32000000 Hz, 49152000 Hz, and 58982400 Hz.
If the divisor results in a decimal fraction, the combination of the base clock and transfer rate is not
available.
The following three examples describe to determine correct combinations of divisors and base clock
frequencies for the given transfer rates.
For 9600 bps transfer rate:
You can find 80 of divisor and 12288000 Hz of base clock frequency as derived from the following
result.
12288000 / (9600 x 16) = 80
For 64000 bps transfer rate:
You can find 8 of divisor and 8192000 Hz of base clock frequency as derived from the following
result.
8192000 / (64000 x 16) = 8
For 52000 bps transfer rate:
You cannot find any correct combinations of divisors and base clock frequencies. As a result,
52000 bps of transfer rate is not available on this product.
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Interface Corporation
