SECTION 1: THEORY OF OPERATION
369548.DOC
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7
Baseband
(refer to schematic on page 34)
This circuitry amplifies the audio from each receiver, routes it through a RF multiplexer, and selects the
audio from the receiver with the highest RSSI value. The comparator circuit on the previous sheet
controls it.
There are three (3) channels of audio, with separate gain and DC offset adjustments to compensate for
performance differences in the receivers. For example, incoming audio from receiver 1 appears at
AUDIO 1. An op amp (U12D) is then amplifies the audio. A pot (R72) adjusts the gain, while another pot
(R57) adjusts the DC offset on the output. The amplifier output passes through a RF multiplexer (U19B),
then drives a low pass filter (U9) through another op amp (U12A) and through the AUDIO_OUT line,
which goes to a switch (S3) and to pin 4 of a connector (J3).
The remaining audio circuits work in the same manner.
The output from U19B also appears on DISC_AUDIO, which goes to the CPU (U1) and from there the
audio is demodulated by the modems.
Receiver Board
(refer to schematic on page 44)
Please be aware that the base station uses three (3) identical receiver boards. As a result, the circuitry
will be described only once.
Front end.
Incoming signals pass through a bandpass filter (FLT1). The desired signals are amplified by
U4 and additional selectivity is provided by a SAW filter (FLT2). The signal passes through an IC mixer
(U5) and the output passes through two (2) crystal filters (FLT3 and FLT4).
IF Amplifier
(refer to schematic on page 45)
The incoming 45 MHz signal passes through C15, C17, and R12 which provides impedance matching to
the IF amplifier input. U2 is a super heterodyne IF subsystem. Inside the chip, the signal is applied to a
mixer. The mixer also accepts a 44.545 MHz local oscillator input. The local oscillator consists of an
internal amplifier, plus crystal (Y1) and associated components. The mixer output passes through Y4, a
455 KHz ceramic IF filter. It is amplified, passed through another 455 KHz ceramic filter (Y3), and on to a
second IF stage. The IF output drives a quadrature detector. The phase shift elements for the detector
are C8 and Y5. The recovered audio appears at pin 9, while RSSI appears at pin 7.
Within the RSSI circuitry, chip U2 uses a detector, which converts the AGC voltage generated inside the
chip into a DC level corresponding logarithmically to signal strength. RSSI is used by Diversity Reception
on the System Controller to select the receiver with the highest quality signal.
A filter consisting of a resistor (R8) and a capacitor (C18) provides high frequency de-emphasis for the
audio. The audio is buffered by op amp U1A. From there the AUDIO output line goes to a connector, for
hookup to Diversity Reception on the System Controller Board.
Resistor (R9) and capacitor (C10) provides RF filtering for the DC RSSI voltage. The RSSI is buffered by
op amp U1B. From there the RSSI output line goes to a connector, for hookup to Diversity Reception on
the System Controller Board.
Several sets of 455 KHz IF filters (Y4 and Y3) are available to suit receiver selectivity requirements.
Should replacement of these filters be required, exact replacement parts must be used.
