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Page 11 of 50
IRAUDAMP5 REV 3.1
.
.
CH1
Feed
back
R19
.
R1
8
R1
3
.
AUDIO_INPUT
+VCC
-B
+B
R5
VS
HO
VB
CSH
DT
COM
LO
VCC
IN-
COMP
VAA
GND
CSD
VREF
VSS
CSLO
IRS2092S
System-level View of Class D Controller and Gate Driver IRS2092S
Fig 11
Selectable Dead-Time
The dead time of the IRS2092S is based on the voltage applied to the DT pin. (Fig 12) An
internal comparator determines the programmed dead time by comparing the voltage at the DT
pin with internal reference voltages. An internal resistive voltage divider based on different ratios
of VCC negates the need for a precise reference voltage and sets threshold voltages for each of
the four programmable settings. Shown in the table below are component values for
programmable dead times between 15 and 45 ns. To avoid drift from the input bias current of the
DT pin, a bias current of greater than 0.5mA is suggested for the external resistor divider circuit.
Resistors with up to 5% tolerance can be used.
Selectable Dead-Time
Dead-time mode
Dead time
R5
R13
DT voltage
DT1
~15ns
3.3k
8.2k
0.71 x Vcc
Default
DT2
~25ns
5.6k
4.7k
0.46 x Vcc
DT3
~35ns
8.2k
3.3k
0.29 x Vcc
DT4
~45ns
open
<10k
0 x Vcc
Vcc
0.89xVcc
0.57xVcc
0.36xVcc
0.23xVcc
Shutdown
45nS
35nS
25nS
15nS
Operational Mode
Dead-time
V
DT
Fig 12 Dead-time Settings vs. V
DT
Voltage
Default
Summary of Contents for IRAUDAMP5
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