www.irf.com
Page 30 of 50
IRAUDAMP5 REV 3.1
In IRAUDAMP5, this switching frequency lock/synchronization feature (Fig 31 and Fig 33) is
achieved with either an internal or external clock input (selectable through S3). If an internal
(INT) clock is selected, an internally-generated clock signal is used, adjusted by setting
potentiometer R113 “INT FREQ.” If external (EXT) clock signal is selected, a 0-5V square-
wave (~50% duty ratio) logic signal must be applied to BNC connector J17.
0.001
10
0.002
0.005
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
%
100m
200
200m
500m
1
2
5
10
20
50
100
W
Red
CH1, = Self Oscillator @ 400kHz
Pink
CH1, = Sync Oscillator @ 400kHz
Blue
CH1, = Sync Oscillator @ 450kHz
Cyan
CH1, = Sync Oscillator @ 350kHz
THD+N Ratio vs. Output Power for Different Switching Frequency Lock/Synchronization Conditions
Fig 34
Summary of Contents for IRAUDAMP5
Page 45: ...www irf com Pa Figure 39 PCB Layout Motherboard ge 44 of 50 IRAUDAMP5 REV 3 1 Top Layer ...
Page 46: ...www irf com Top silk screen Page 45 of 50 IRAUDAMP5 REV 3 1 ...
Page 47: ...www irf com Page 46 of 50 IRAUDAMP5 REV 3 1 Bottom ...
Page 48: ...www irf com Page 47 of 50 IRAUDAMP5 REV 3 1 4 0 ...
Page 49: ...www irf com Page 48 of 50 IRAUDAMP5 REV 3 1 Bottom Silkscreen 4 0 ...