Rev 2.0
Page 58 of 164
Generic Qseven Carrier Board Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Table 17: PCIe Port2 Header Pin Out
Pin No
Pin Name
Signal Type
Voltage Level/
Termination
Description
1
VCC_12V
Power
12V
Supply Voltage 12V.
2
VCC_3V3
Power
3.3V
Supply Voltage 3.3V.
3
P
Output
Differential
PCIe2 transmit pair positive.
Connected to 167
th
Pin of Qseven MXM
Connector.
4
VCC_3V3
Power
3.3V
Supply Voltage 3.3V.
5
PCIE2_TX-
Output
Differential
PCIe2 transmit pair negative.
Connected to 169
th
Pin of Qseven MXM
Connector.
6
P
Input
Differential
PCIe2 receive pair positive. Connected
from 168
th
Pin of Qseven MXM
Connector.
7
GND
Power
0V
Ground.
8
PCIE2_RX-
Input
Differential
PCIe2 differential receive line negative.
Connected from 170
th
Pin of Qseven
MXM Connector.
9
PCIE4_CLK-
Output
Differential
PCIe4 reference clock pair negative.
Connected to 157
th
Pin of Qseven MXM
connector through Clock buffer.
10
GND
Power
0V
Ground.
11
PC
Output
Differential
PCIe4 reference clock pair positive.
Connected to 155
th
Pin of Qseven MXM
connector through Clock buffer.
12
PCIE2_RST#
Output
3.3V CMOS
PCIe2 Reset.
Connected to 158
th
Pin of Qseven MXM
connector through buffer.
13,14
GND
Power
0V
Ground.
15
PCIECLK_OE4#
Input
3.3V CMOS
PCIe clock request.
16
VCC_3V3
Power
3.3V
Supply Voltage 3.3V.
17
SMB_DAT
Input/ Output
3.3V CMOS
System Management Bus Data.
Connected to 62
nd
Pin of Qseven MXM
Connector.
18
SMB_CLK
Input
3.3V CMOS
System Management Bus Clock.
Connected to 60
th
Pin of Qseven MXM
Connector.