38
4.4 Chipset Features Setup
ROM PCI / ISA BIOS (2A59FI3D)
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
Auto Configuration
: Disabled
Memory Parity / ECC Check
: Auto
DRAM Timing
: 70ns
Signal Bit Error Report
: Enabled
DRAM RAS# Precharge Time
: 4
L2 Cache Cacheable Size
: 64MB
DRAM R/W Leadoff Timing
: 7/6
Chipset NA# Asserted
: Enabled
Fast RAS# To CAS# Delay
: 3
Pipeline Cache Timing
: Faster
DRAM Read Burst <EDO/FPM>
: x333/x444
DRAM Read Burst Timing
: x444
Turbo Read Leadoff
: Enabled
DRAM Speculative Leadoff
: Disabled
Turn-Around Insertion
: Disabled
ISA Clock
: PCI CLK/3
System BIOS Cacheable
: Disabled
Video BIOS Cacheable
: Disabled
8 Bit I/O Recovery Time
: 1
16Bit I/O Recovery Time
: 1
ESC : Quit
→
: Select Item
Memory Hole At 15M-16M
: Disabled
F1 : Help PU/PD/+/- : Modify
Peer Concurrency
: Disabled
F5 : Old Values (Shift) F2 : Color
Chipset Special Features
: Disabled
F6 : Load BIOS Defaults
DRAM ECC / PARITY Select
: Parity
F7 : Load Setup Defaults
This section a llows you to configure the system ba sed on the specific fea tures of
the insta lled chipset. This chipset ma na ges bus speeds a nd a ccess to system
memory resources, such a s DRAM a nd the externa l ca che. It a lso coordina tes
communica tions between the conventiona l ISA bus a nd the PCI bus. It must be
sta ted tha t these items should never need to be a ltered. The defa ult settings ha ve
been chosen beca use they provide the best opera ting conditions for your system.
The only time you might consider ma king a ny cha nges would be if you
discovered tha t da ta wa s being lost while using your system.
DRAM Settings
The first chipset settings dea l with CPU a ccess to dyna mic ra ndom a ccess
memory (DRAM). The defa ult timings ha ve been ca refully chosen a nd should
only be a ltered if da ta is being lost. Such a scena rio might well occur if your
system ha d mixed speed DRAM chips insta lled so tha t grea ter dela ys ma y be
required to preserve the integrity of the da ta held in the slower memory chips.
Summary of Contents for P55TU
Page 4: ......