Architecture
4.3 Interrupt
handling
The card is transparent, which means that the interrupt signal on the PCI-bus
(INTA#) is active when a CAN-controller issues an interrupt signal and it remains
active until the signal on the CAN-controller is reset by an interrupt acknowledge
by the PC. The PCI-bus interface chip PLX PCI9050-1 does not appear here.
It should be noted that the PCI-bus interrupt in the PCI-specification is defined as
level-triggered. With the ISA-bus, the interrupt was transition-triggered.
Copyright IXXAT Automation GmbH
PC-I 04/PCI-Manual, Version 1.2
13
Summary of Contents for PC-I 04/PCI
Page 4: ......
