1-34
NX-HD10
V
CC
GND
I/O1 - I/O8
I/O9 - I/O16
/CE1
/LB
/UB
/WE
/OE
CE2
Output data
controller
Input data
controller
Address
buffer
Row
decoder
Memory cell array
2,097,152 bits
Address buffer
1. Pin layout
2. Block diagram
UPD442012AGYC70 (IC951) : 2M-bit cmos static ram
Sense amplifier/
Switching circuit
Column decoder
A0
A16
48
~
25
1
~
24
Summary of Contents for CA-NXHD10
Page 62: ...3 2 NX HD10 M E M O ...