A
1
2
3
4
5
B
C
D
E
F
G
IC1601
SDRAM_A[14-17]
C1710
C1708
D3.3V
SSTL2_VDD
C1621
R1707
GND
GND
SDRAM_VREF
K1701
SDRAM_CLK[0]
SDRAM_CLK[1]
SDRAM_CLK_L[0]
SDRAM_CLK_L[1]
C1622
R1653
R1654
R1655
R1656
C1623
IC1602
R1645
R1642
C1624
IC1601
IC1601
R1657
IC1601
C1625
R1658
R1646
R1647
SDRAM_DQS[0]
SDRAM_DQS[1]
SDRAM_DQS[2]
SDRAM_DQS[3]
IC1601
IC1602
R1659
R1660
IC1602
RA1617
R1617
R1618
R1623
R1608
R1607
R1606
R1605
RA1629
R1648
R1649
R1644
IC1602
IC1602
R1650
IC1602
R1651
R1624
R1619
R1620
R1625
RA1630
IC1601
R1652
C1701
C1703
C1704
RA1609
RA1618
RA1619
RA1620
C1702
RA1621
RA1631
RA1632
RA1625
RA1626
R1609
C1707
RA1610
RA1611
RA1612
C1605
C1606
IC1701
C1607
C1608
C1609
C1610
C1611
C1612
K1702
C1613
C1614
RA1613
C1615
C1616
C1617
C1618
C1619
C1620
RA1614
RA1615
RA1616
RA1627
RA1628
R1610
R1611
R1612
RA1622
RA1623
RA1624
C1709
C1647
R1701
R1702
R1703
R1704
C1648
RA1601
RA1602
RA1603
RA1604
C1637
C1601
C1602
C1638
RA1605
RA1606
RA1607
RA1608
C1639
C1640
R1626
SDRAM_A[0-12]
R1604
R1603
R1602
R1601
SDRAM_CKE
SDRAM_RAS_L
SDRAM_CAS_L
SDRAM_WE_L
R1621
R1622
R1627
R1628
R1613
C1649
C1651
C1643
C1641
C1650
C1652
C1644
C1642
C1645
C1646
C1705
R1614
R1615
C1653
C1706
R1616
C1654
SDRAM_DQ[16-31]
SDRAM_DQ[0-15]
SDRAM_DQM[0]
SDRAM_DQM[1]
SDRAM_DQM[2]
SDRAM_DQM[3]
C1657
C1658
C1655
C1656
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
BA0
BA1
/6.3
T
/6.3
T
OPEN
SHORT
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
BA0
BA1
OPEN
VREF
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
#1
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
GNDQ
GNDQ
GNDQ
GNDQ
GNDQ
GND
GND
GND
OPEN
OPEN
CS
CKE
RAS
CAS
WE
LDM
UDM
LDQS
UDQS
CLK
CLK
NC
NC
NC
NC
NC
NC
NC
CS
CKE
RAS
CAS
WE
LDM
UDM
LDQS
UDQS
CLK
CLK
OPEN
VREF
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
#2
D15
D14
D13
D11
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
GNDQ
GNDQ
GNDQ
GNDQ
GNDQ
GND
GND
GND
NC
NC
NC
NC
NC
NC
NC
/6.3
/6.3
OPEN
3
9
PQ015YZ01Z
15
55
61
1
33
SHORT
3
9
15
55
61
1
33
OPEN
OPEN
OPEN
OPEN
OS
OPEN
_0.5%
_0.5%
OPEN
/4V
/4V
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OS
OS
47
47
0.1
0.1
0‘
0‘
0‘
0‘
0.1
10
0.1
22
0.1
22
22
22
100
27
27
27
47
47
47
47
47
100
47
100
100
27
100
100
100
47
100
0.1
0.1
100
22
100
100
100
100
100
47
47
10
10
0.1
22
22
22
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
22
0.1
0.1
0.1
0.1
0.1
22
22
22
10
10
100
100
100
270
1k
2.2k
2.2k
0.1
100
100
100
100
220
220
0.1
100
100
100
100
0.1
100
10
10
10
10
27
27
27
27
0‘
0.1
0.1
0.1
0.1
0.1
0‘
0‘
0.1
0‘
0.1
0.1
0.1
SDRAM_DQM[0]
DDR_RAS_L
DDR_CKE
DDR_WE_L
DDR_CAS_L
SDRAM_A[14-17]
D3.3V
SSTL2_VDD
DDR_DQ[7]
DDR_DQM[2]
DDR_WE_L
DDR_CAS_L
DDR_RAS_L
DDR_CKE
DDR_A[0]
DDR_DQ[6]
DDR_DQ[5]
DDR_DQ[4]
DDR_DQ[3]
DDR_DQ[2]
DDR_DQ[1]
DDR_DQ[0]
DDR_DQ[8]
DDR_DQ[9]
DDR_DQ[10]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]
DDR_DQ[14]
DDR_DQ[15]
DDR_DQ[23]
DDR_DQ[22]
DDR_DQ[21]
DDR_DQS[1]
DDR_DQS[0]
DDR_DQM[1]
DDR_DQM[0]
DDR_DQ[20]
DDR_DQ[19]
DDR_DQ[18]
DDR_DQ[17]
DDR_DQ[16]
DDR_DQ[24]
DDR_DQ[25]
DDR_DQ[26]
DDR_A[0]
DDR_A[1]
DDR_A[11]
DDR_A[10]
DDR_A[12]
DDR_BA[1]
DDR_A[9]
DDR_A[8]
DDR_A[7]
DDR_A[6]
DDR_A[5]
DDR_A[4]
DDR_A[3]
DDR_A[2]
DDR_DQ[27]
SDRAM_DQM[0]
DDR_DQ[28]
DDR_DQ[29]
DDR_DQ[30]
DDR_DQ[31]
SDRAM_DQM[1]
SDRAM_DQM[2]
SDRAM_DQM[3]
SDRAM_A[0]
SDRAM_DQS[0]
SDRAM_DQS[1]
SDRAM_DQS[2]
SDRAM_DQS[3]
DDR_DQ[16]
DDR_DQM[0]
DDR_DQM[1]
DDR_DQM[2]
DDR_DQM[3]
DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQS[0]
DDR_DQS[1]
DDR_DQS[2]
DDR_DQS[3]
DDR_CS[0]
SDRAM_A[17]
DDR_CLK_L[1]
DDR_CLK[1]
DDR_DQS[3]
DDR_DQS[2]
DDR_DQM[3]
DDR_DQM[2]
DDR_A[1]
DDR_A[0]
DDR_A[1]
DDR_A[11]
DDR_A[10]
DDR_A[12]
DDR_BA[1]
DDR_A[9]
DDR_A[8]
DDR_A[7]
DDR_A[6]
DDR_A[5]
DDR_A[4]
DDR_A[3]
DDR_A[2]
DDR_BA[0]
DDR_BA[1]
SDRAM_A[0-12]
DDR_BA[0]
DDR_BA[1]
DDR_DQ[17]
DDR_BA[0]
DDR_BA[0]
DDR_DQ[18]
SDRAM_DQM[1]
SDRAM_DQM[2]
SDRAM_DQM[3]
SDRAM_DQS[0]
SDRAM_DQS[1]
DDR_A[0]
DDR_A[1]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
DDR_DQ[23]
DDR_DQ[24]
DDR_DQ[25]
DDR_DQ[26]
DDR_DQ[27]
DDR_DQ[28]
DDR_DQ[29]
DDR_DQ[30]
DDR_DQ[31]
SDRAM_DQS[2]
SDRAM_DQS[3]
VTT
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[9]
DDR_DQ[10]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]
DDR_DQ[14]
DDR_DQ[15]
SDRAM_DQ[0-15]
SDRAM_CLK[0]
SDRAM_CLK[0]
DDR_A[11]
DDR_A[10]
DDR_A[12]
DDR_A[9]
DDR_A[8]
DDR_A[7]
DDR_A[6]
DDR_A[5]
DDR_A[4]
DDR_A[3]
DDR_A[2]
DDR_A[11]
DDR_A[10]
DDR_A[12]
SDRAM_CLK[1]
DDR_A[9]
DDR_A[8]
SDRAM_A[15]
SDRAM_A[1]
SDRAM_A[2]
SDRAM_CAS_L
SDRAM_A[3]
SDRAM_A[4]
SDRAM_A[5]
SDRAM_A[6]
SDRAM_A[7]
SDRAM_A[8]
SDRAM_A[9]
SDRAM_A[10]
SDRAM_A[11]
SDRAM_A[12]
SDRAM_A[14]
DDR_A[7]
DDR_A[6]
DDR_A[5]
DDR_A[4]
DDR_A[3]
DDR_A[2]
SDRAM_CLK[1]
SDRAM_CLK_L[0]
SDRAM_CLK_L[1]
SDRAM_RAS_L
SDRAM_CKE
DDR_WE_L
DDR_WE_L
DDR_CAS_L
DDR_RAS_L
DDR_CKE
DDR_CAS_L
DDR_RAS_L
DDR_CKE
SDRAM_WE_L
SDRAM_WE_L
SDRAM_CAS_L
SDRAM_RAS_L
SDRAM_CKE
SDRAM_CLK_L[0]
SDRAM_DQ[15]
SDRAM_CLK_L[1]
SDRAM_DQM[0]
SDRAM_DQM[1]
SDRAM_DQM[2]
SDRAM_DQM[3]
SDRAM_DQS[0]
SDRAM_DQS[1]
SDRAM_DQS[2]
SDRAM_DQS[3]
DDR_CLK[0]
SDRAM_DQ[14]
DDR_CLK_L[0]
DDR_CLK[0]
SDRAM_CLK[0]
DDR_DQM[0]
DDR_DQM[1]
DDR_DQM[3]
DDR_DQS[2]
DDR_DQS[0]
DDR_DQS[1]
DDR_DQS[3]
DDR_CLK_L[1]
SDRAM_CLK[1]
SDRAM_CLK_L[0]
SDRAM_CLK_L[1]
DDR_CLK_L[0]
DDR_CLK[1]
SDRAM_DQ[13]
SDRAM_DQ[12]
SDRAM_DQ[11]
SDRAM_DQ[10]
SDRAM_DQ[9]
SDRAM_DQ[8]
SDRAM_DQ[7]
DDR_DQ[16]
DDR_DQ[17]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[20]
SDRAM_DQ[6]
DDR_DQ[21]
SDRAM_DQ[5]
SDRAM_DQ[4]
SDRAM_DQ[3]
SDRAM_DQ[2]
SDRAM_DQ[1]
SDRAM_DQ[0]
SDRAM_DQ[31]
SDRAM_DQ[30]
SDRAM_DQ[29]
DDR_DQ[22]
DDR_DQ[23]
SDRAM_DQ[28]
SDRAM_DQ[27]
SDRAM_DQ[26]
SDRAM_DQ[25]
SDRAM_DQ[24]
SDRAM_DQ[23]
SDRAM_DQ[22]
SDRAM_DQ[21]
SDRAM_DQ[20]
SDRAM_DQ[19]
SDRAM_DQ[18]
DDR_DQ[24]
DDR_DQ[25]
DDR_DQ[26]
DDR_DQ[27]
DDR_DQ[28]
DDR_DQ[29]
DDR_DQ[30]
DDR_DQ[31]
DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[9]
DDR_DQ[10]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]
DDR_DQ[14]
DDR_DQ[15]
SDRAM_DQ[16-31]
SDRAM_DQ[0]
SDRAM_DQ[1]
SDRAM_DQ[2]
SDRAM_DQ[3]
SDRAM_DQ[4]
SDRAM_DQ[5]
SDRAM_DQ[6]
SDRAM_DQ[7]
SDRAM_DQ[8]
SDRAM_DQ[9]
SDRAM_DQ[10]
SDRAM_DQ[11]
SDRAM_DQ[12]
SDRAM_DQ[13]
SDRAM_DQ[14]
SDRAM_DQ[15]
SDRAM_DQ[16]
SDRAM_DQ[17]
SDRAM_DQ[18]
SDRAM_DQ[19]
SDRAM_DQ[20]
SDRAM_DQ[21]
SDRAM_DQ[22]
SDRAM_DQ[23]
SDRAM_DQ[24]
SDRAM_DQ[25]
SDRAM_DQ[26]
SDRAM_DQ[27]
SDRAM_DQ[28]
SDRAM_DQ[29]
SDRAM_DQ[30]
SDRAM_DQ[31]
SDRAM_DQ[17]
SDRAM_DQ[16]
81
0.1
81
TO SHEET 4
DDR SDRAM section
SHEET 3
p10595001a_rev0
2-15
2-16
