KD-LX333R
1-33
LC75878W (IC601) : LCD driver
1. Pin layout
2. Block diagram
1
~
25
75
~
51
26 ~ 50
100 ~ 76
88
89
90
91
92
93
94
95
96
97
98
99
100
I
I
I
I
-
I/O
I
I
I
I
Segment driver output pin.
Segment driver output pin.
Segment driver output pin.
Common driver output pin.
General-purpose output pin.
Logic block power supply pin.
LCD driver power supply pin.
LCD driver bias 4/4 voltage (H-level) power pin.
LCD driver bias 3/4 voltage (intermediate level) power pin.
LCD driver bias 2/4 voltage (intermediate level) power pin.
LCD driver bias 1/4 voltage (intermediate level) power pin.
LCD driver bias 0/4 voltage (L-level) power pin.
Power supply pin to connect to ground.
Oscillator pin.
Display off, general-purpose output port L fixed input pin.
Chip enable
Synchronization clock
Transfer data
SEG1~SEG73
SEG74
SEG75
COM8~COM1
P1~P4
VDD
VLCD
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
VSS
OSC
LCD RESET
CE
CL
DI
Function
OSC
VLCD
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
VDD
VSS
P1
P4
COM1
COM8
S75/COM9
S74/COM10
S73
S1
INH
DI
CL
CE
GENERAL
PORT
COMMON
DRIVER
SEGMENT DRIVER & LATCH
SHIFT REGISTER
CONTROL
REGISTER
CCB
INTERFACE
CLOCK
GENERATOR
CONTRAST
ADJUSTER
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