JVC RX-E100SL, Service Manual

RX-E100SL

1-13

DLCKS terminal

L
L

H
H

DLONterminal

L

H

L

H

          DLL clock setting
SCKI input (DLL circuit OFF)
Four times XI clock
Three times XI clock
Six times XI clock

1
2
3
4
5
6
7

8~11

12
13
14
15

16~18

19
20
21
22
23
24
25
26

27,28

29~31

32,33

34
35
36
37

38,39

40
41
42
43
44
45
46
47
48
49
50
51
52
53

54~61

62

63~70

71

72~80

81

82~89

90
91

92,93

94
95
96
97

98,99

100

Pin No.

Symbol

I/O

Function

RST

MIMD

MICS

MILP

MIDIO

MICK

MIACK

FI0~3

IRQ

VSS

LRCKA

BCKA

SDO0~2

SD03

LRCKB

BCKB

SDT0
SDT1

VDD

LRCKOA

BCKOA

TEST0,1

LRCKOB,BCKOB,TXO

TEST2,3

RX

VSS

TSTSUB0

FCONT

TSTSUB1,TSTSUB2

PDO

VDDA
PLON

AMPI

AMPO

CKI

VSSA

CKO

LOCK

VSS

WR

OE
CE

VDD

IO7~0

VSS

AD0~7

VDD

AD8~16

VSS

PO0~7

VDDDL

LPFO

DLON,DLCKS

SCKO

VSSDL

SCKI

VSSX
XO,XI

VDDX

I
I
I
I

I/O

I

O

I
I
-
I
I

O

-
I
I
I
I
-

O
O

I
-
I
I
-
I

O

I

O

-
I
I

O

I
-

O
O

-

O
O
O

-

I/O

-

O

-

O

-

O

-

O

I
-
-
I
-

I/O

-

Reset signal input terminal (L:reset  H:Operation usually)
Microcomputer interface mode selection input terminal (L:serial  H:IC bus)
Microcomputer interface chip select input terminal
Microcomputer interface latch pulse input
Microcomputer interface data I/O terminal
Microcomputer interface clock input terminal
Microcomputer interface acknowledge output terminal
Flag input terminal 0~3
Interrupt input terminal
Digital ground terminal
Audio interface LR clock input terminal A
Audio interface bit clock input terminal A
Audio interface data output terminal 0
Non connect
Audio interface LR clock input terminal B
Audio interface bit clock input terminal B
Audio interface data input terminal 0
Audio interface data input terminal 1
Power supply for digital circuit
Audio interface LR clock output terminal A
Audio interface bit clock output terminal A
Test input terminal 0/1  (L:test  H:operation usually)
Non connect
Test input terminal (L:test  H:operation usually)
SPDIF input terminal
Ground terminal for digital circuit
Test sub input terminal 0 (L:test  H:operation usually)
VCO Frequency control output terminal
Test sub input terminal 1,2 (L:test  H:operation usually)
Phase error signal output terminal
Power supply for analog circuit
Clock selection input terminal (L:external clock  H:VCO clock)
AMP.input terminal for LPF
AMP.output terminal for LPF
External clock input terminal
Ground terminal for analog circuit
DIR Clock output terminal
VCO Lock detection output terminal
Ground terminal for digital circuit
External SRAM writing signal output terminal
External SRAM output enable signal output terminal
External SRAM chip enable signal output terminal
Power supply terminal for digital circuit
External SRAM data I/O terminal 7~0
Ground terminal for digital circuit
External SRAM address output terminal 0~7
Power supply terminal for digital circuit
External SRAM address output terminal 8~16
Ground terminal for digital circuit
General purpose output terminal 0~7
Power supply terminal for DLL
LPF output terminal for DLL
Refer to the undermentioned table
Non connect
Ground terminal for DLL
External system clock input terminal
Ground termonal for oscillation circuit
Oscillation I/O terminal
Power supply terminal for oscillation circuit

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