TH-V70
1-27
Pin No.
Symbol
Function
I/O
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84 - 91
92
93 - 100
-
REQ
-
-
VSS
EPCS
EPSK
EPDI
EPDO
VDD
SCLKO
S2UTD
U2SDT
CPSCK
P74/SBI1
SDOUT
-
-
NMI
ADSCIRQ
ODCIRQ
DECIRQ
CSSIRQ
ODCIRQ2
ADSEP
RST
VDD
TEST1 - TEST 8
VSS
D0 - 7
-
O
-
-
-
O
O
I
O
-
I
I
O
O
-
O
-
-
-
I
I
I
I
I
I
I
-
I
-
I/O
Not connect
Communication request
Connect to TP405 (REQ)
Not connect
Ground
EEPROM chip select
EEPROM clock
EEPROM data input
EEPROM data output
Power supply
Communication clock
Communication input data
Communication output data
Clock for ADSC serial
Connect to VSS
ADSC serial data output
Not use (Connect to ground)
Not use (Connect to ground)
Not use (Connect to ground)
Interrupt input of ADSC
Interrupt input of ODC
Interrupt input of ZIVA
Interrupt input of SODC
Interruption of system control
Address data selection input
Reset input
Power supply
Test signal (1 - 8) input
Ground
Data bus (0 - 7) of CPU
14
13
12
11
10
9
8
7
6
5
4
3
2
1
1A
1B
1Y
2A
2B
2Y
GND
VCC
4B
4A
4Y
3B
3A
3Y
1. Terminal layout & Block diagram
TC74HC00AF (IC408) :
Quad 2 input NAND gate
Summary of Contents for TH-V70
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