TH-V70
1-33
91
92
93
94
95
96
97
98
99
100
Pin No.
LPFO
DLON
DLCKS
SCKO
VSSDL
SCKI
VSSX
XO
XI
VDDX
O
I
I
O
-
I
-
O
I
-
Low pass filter output for DLL circuit
DLCKS pin DLON pin DLL clock setting
"L" "L" SCKI input (DLL = off)
"L" "H" 4th times of XI clock
"H" "L" 3rd times of XI clock
"H" "H" 6th times of XI clock
ASP clock output (Not connect)
Ground for DLL circuit
External system clock input
Ground for crystal oscillator
Crystal oscillator output
Crystal oscillator input
Digital power supply
74LCX373MTC (IC512,IC513) : Octal D-type latch
1. Terminal layout
2. Truth table
1
OE
2
Q0
3
D0
4
D1
5
Q1
6
Q2
7
20
19
18
17
16
15
14
D2
VCC
Q7
D7
D6
Q6
Q5
D5
(TOP VIEW)
8
D3
9
Q3
10
GND
13
12
11
D4
Q4
LE
OE
H
L
L
L
Y
Z
Qn
L
H
INPUTS
OUTPUT
LE
X
L
H
H
D
X
X
L
H
X: Don't care
Z: High impedance
Qn: Q outputs are latched at the time when the LE input
is taken to a low logic level.
3. Block diagram
Q
L
D
D0
3
2
Q0
11
1
LE
OE
Q
L
D
D1
4
5
Q1
Q
L
D
D2
7
6
Q2
Q
L
D
D3
8
9
Q3
Q
L
D
D4
13
12
Q4
Q
L
D
D5
14
15
Q5
Q
L
D
D6
17
16
Q6
Q
L
D
D7
18
19
Q7
Function
I/O
Symbol
Summary of Contents for TH-V70
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