PXIe-2519 | jytek.com | 4
2.1.4 PXI Trigger Bus
All slots on PXIe-2519 share eight trigger lines, peripheral module can deliver trigger
or clock via the trigger bus to synchronize the data acquisition operation.
2.1.5 PXI Local Bus
The local bus on PXIe-2519 is a daisy-chained bus that connects each peripheral slot
with adjacent peripheral slots to the left and right, which by routing PXI Local Bus 6
signal between adjacent peripheral slots.
2.1.6 System Reference Clock and Synchronization Signal
The PXIe-2519 supplies 10MHz reference clock (PXI_CLK10), 100MHz reference clock
(PXIe_CLK100) and synchronization signal (PXIe_SYNC100) to each peripheral slot for
inter-module synchronization.
The PXIe-2519 has the default timing relationship of PXI_CLK10, PXIe_CLK100 and
PXIe_SYNC100 as show in Figure 4 which comply with PXI-5 specification.
Figure 4 PXIe-2519 System Reference Clock Default Behavior
Summary of Contents for PXIe-2519
Page 1: ...PXIe 2519 Chassis User Manual User Manual Version 1 0 3 Revision Date September 10 2021 ...
Page 9: ...PXIe 2519 jytek com 5 Specifications 2 2 1 Basic Table 1 Basic Specification 2 2 2 Electrical ...
Page 10: ...PXIe 2519 jytek com 6 Table 2 Electrical Specification 2 2 3 System Synchronization Clock ...
Page 15: ...PXIe 2519 jytek com 11 Figure 7 Top View PXIe 2519 Gen 3 Gen 2 ...
Page 16: ...PXIe 2519 jytek com 12 Figure 8 Bottom View PXIe 2519 Gen 3 Gen 2 ...
Page 25: ...PXIe 2519 jytek com 21 Figure 12 PCIe Bus Throughput ...
Page 32: ...PXIe 2519 jytek com 28 Figure 17 Change Target Temperature to 45 C ...
Page 34: ...PXIe 2519 jytek com 30 Figure 18 NI MAX GUI display JYTEK chassis and modules ...
