6.5.5.2 SinCos encoder
Ch1: SINCOS(1) - SinCos signals
SinCos encoders can ...
a. Be pure incremental encoders
without
an absolute value interface. In this
case,
P 540[0] - ENC_CH1_Abs
must be set to OFF(0).
b. Be incremental encoders
▸
with
an absolute value interface. In this case,
P 540[0] - ENC_CH1_Abs
must be accordingly set to SSI(1), EnDat(2),
HIPER(3) or, in special cases, SSI_CONT(4) so that it will be possible to read
the absolute encoder position for the absolute value initialization routine
once during the initialization phase.
6.5.5.2.1 Purely SinCos incremental encoders
To run these encoders as purely incremental encoders with a zero pulse on encoder
channel Ch1 (without an absolute value interface), the approach is basically the
same as for purely TTL operation (see Section "TTL encoder" on page 64). The
same parameters apply.
However, there are the following differences:
a. There are no different signal types for the SinCos signal (always 1 Vss for
cosine and sine).
b. The zero pulse is the analogue zero pulse typical of SinCos encoders (see
the “Connection for high-resolution encoders” section in the ServoOne
Operation Manual Single-Axis System, for example).
6.5.5.2.2 Linear SinCos incremental encoders
Linear SinCos encoders are operated as rotary encoders. For linear motor
operation, P 542[0] - ENC_CH1_Lines and the encoder gearing (see Section
"Encoder gearing" on page 91) are used to establish the ratio for the linear motor’s
ID No.: 0842.26B.5-01 Date: 09.2020
ServoOne - Device Help
66
6 Encoder
pole pair subdivision (North-North) for commutation. 1 x North-North corresponds to
one revolution from Lines. In this case, the motor pole pair number must be set to 1.
Moreover, P 553[0] - ENC_CH1_PeriodLen is not used in this case.
6.5.5.2.3 Signal correction (GPOC)
The GPOC (gain phase offset correction) routine used for track signal correction
purposes for sine/cosine signals is used to compensate for systematic errors. The
routine is controlled in encoder channel Ch1 with P 549[0] - ENC_CH1_Corr and
P 550[0] - ENC_CH1_CorrVal. For details see Section "Signal correction GPOC
(Gain Phase Offset Correction)" on page 75
6.5.5.2.4 SinCos incremental encoders with absolute value inter-
face
The following table lists the parameters for cyclical SinCos operation on encoder
channel Ch 1 with one-time reading of the absolute encoder position via the
absolute value interface, i.e. without a zero pulse:
ID
Index Name
Unit Description
505
0
ENC_CH1_Sel = 1
Encoder selection set to SINCOS(1)
510
0
ENC_CH1_Num
Encoder gearing: Numerator
511
0
ENC_CH1_Denom
Encoder gearing: Denominator
540
0
ENC_CH1_Abs
Absolute value interface selection (one-time
reading)
542
0
ENC_CH1_lines
Number of Lines (Sin/Cos / TTL encoders)
543
0
ENC_CH1_MultiT
Number of MultiTurn bits (absolute encoder)
544
0
ENC_CH1_SingleT
Number of SingleTurn bits (absolute encoder)
545
0
ENC_CH1_Code
Code selection (SSI encoder) (binary, gray)
546
0
ENC_CH1_Mode
Mode selection (SSI encoder)
547
0
ENC_CH1_MTBase
Definition of point of discontinuity in multi-turn
range
548
0
ENC_CH1_MTEnable
Enable MultiTurn use (negative logic, 1=MToff)
Table 6.10: Parameters for channel 1 (X7) - SinCos encoder
