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2600AS-901-01 Rev. B / September 2008
Section 19: Remote Commands
Series 2600A System SourceMeter® Instruments Reference Manual
status.questionable.unstable_output.condition
status.questionable.unstable_output.enable
status.questionable.unstable_output.event
status.questionable.unstable_output.ntr
status.questionable.unstable_output.ptr
Attribute
Questionable status unstable output summary register set.
Default
0
TSP-Link
accessibility
This attribute can be accessed from a remote TSP-Link node.
Usage
Reads condition, enable, event, NTR, and PTR registers:
quesreg = status.questionable.unstable_output.condition
quesreg = status.questionable.unstable_output.enable
quesreg = status.questionable.unstable_output.event
quesreg = status.questionable.unstable_output.ntr
quesreg = status.questionable.unstable_output.ptr
Writes to enable, NTR, and PTR registers:
status.questionable.unstable_output.enable = quesreg
status.questionable.unstable_output.ntr = quesreg
status.questionable.unstable_output.ptr = quesreg
Set
operreg
to one of the following values:
0
Clears all bits.
status.questionable.unstable_output.SMUA
Sets SMUA bit (B1).
status.questionable.unstable_output.SMUB
Sets SMUB bit (B2).
quesreg
can also be set to the decimal weight of the bit to be set. Examples:
To set bit B1 (SMUA), set
quesreg
to 2 (2
1
).
To set bit B2 (SMUB), set
quesreg
to 4 (2
2
).
To set both bits, set
quesreg
to the sum of the decimal weights of both bits.
To set bits B1 and B2, set
quesreg
to 6 (2 + 4).
Remarks
• These attributes are used to read or write to the questionable status unstable output summary
registers.
• Reading a status register returns a value. The binary equivalent of the returned value indicates
which register bits are set. The least significant bit of the binary number is bit 0, and the most
significant bit is bit 15.
• For example, assume value 6 is returned for the enable register. The binary equivalent is
0000000000000110. This value indicates that bit B1 (SMUA) and bit B2 (SMUB) are set.
• The used bits of the questionable status unstable output summary registers are described as
follows:
•
Bit B1, SMUA
: Set bit indicates the enabled UO bit for the SMU A questionable register is
set.
•
Bit B2, SMUB
: Set bit indicates the enabled UO bit for the SMU B questionable register is
set.
Details
.
Example
Sets the SMUA bit of the questionable status unstable output summary enable register:
status.questionable.unstable_output.enable =
status.questionable.unstable_output.SMUA