Section 6: Clarius
Model 4200A-SCS Parameter Analyzer Reference Manual
6-156
4200A-901-01 Rev. C / February 2017
The following information explains stress testing using the Stress/Measure Mode. Stressing is
provided by SMUs or Keithley Instruments pulse cards or both (using the standard pulse mode for
AC stressing).
Stressing can also be provided by Keithley Instruments pulse cards using the Segment Arb pulse
mode. Refer to
(on page 6-170, on page 6-175) for supplemental
information on using Segment Arb for stress testing.
For stress testing, a Clarius evaluation consists of pre-stress tests at a particular subsite, followed by
alternate cycles of stressing and retesting. Clarius performs these cycles automatically when you
select Stress/Measure Mode in the Subsite Setup tab. During the evaluation, Clarius can display
intermediate numerical and graphical results and status information. Clarius ends the evaluation
when the devices degrade beyond specified exit criteria (target degradation) or when the total
stressing time reaches a specified maximum, whichever comes first.
DC Voltage stressing
Clarius’s built-in stress algorithm uses SMUs to DC voltage stress multiple devices concurrently. The
following capabilities apply to device stressing during hot carrier injection (HCI) studies. Similar
capabilities apply to other types of voltage stress-measure studies.
•
A unique gate-stress bias voltage (Vg Stress) and a unique drain-stress bias voltage (Vd Stress)
can be applied to each evaluated device, within the source limitations of the system. Each unique
gate or drain stress bias condition requires a dedicated source. For example, if your 4200A-SCS
system contains four SMUs, you can apply a maximum of four unique stress bias voltages (gate
voltages plus drain voltages combined). If your 4200A-SCS system has eight SMUs, four medium
power and four high power, you can apply a maximum of eight unique stress bias voltages.
•
When some of the devices are connected in parallel, the program can voltage stress up to twenty
devices at once, subject to system resource and matrix limitations. The following figure illustrates
a voltage stressing configuration that uses the maximum software and system capabilities.
•
If your voltage stress system is using a switch matrix, the 4200A-SCS tries to maximize the
amount of SMU sharing in order to allow parallel testing. It determines which pins can share
SMUs in the following fashion. If pins from different devices have the same name (for example,
gate pin, drain pin) and the like-named pins are assigned the same voltage stress, then when the
stress is applied, these pins are automatically connected to the same SMU through the switch
matrix. That SMU supplies the voltage stress to all the pins simultaneously.
•
Because parallel-connected devices share resources, Clarius monitors stressing resources when
Stress Properties are configured. If the requirements exceed the resources, Clarius reports an
error.
Figure 316: DC voltage stressing: 20 parallel-connected devices stressed at eight gate and
drain voltages
