Model 4200A-SCS Parameter Analyzer Reference Manual
Section 6: Clarius
4200A-901-01 Rev. C / February 2017
6-341
Figure 399: Program pulse waveforms for a floating gate DUT with separate pulse waveforms
for the DUT gate, drain, source, and bulk
Figure 400: P Erase pulse waveforms for a floating gate DUT, with separate pulse
waveforms for the DUT gate, drain, source, and bulk
The block diagram for the flash setup is shown in the following figure. To reconfigure from the pulse
stress to DC measure phases, activate the switches on the SMU and pulse cards. During the pulse
program/erase phase, the relays in the pulse channels are closed and the relays in the SMUs are
open. For the DC measure phase, the opposite is true.
