Section 13: LPT library function reference
Model 4200A-SCS Parameter Analyzer Reference Manual
13-130
4200A-901-01 Rev. C / February 2017
Details
Use this command to set the number of iterations for load-line effect compensation (LLEC). LLEC is
an algorithm, running on each PMU in the test, that adjusts the output of the PMU to respond to the
device-under-test resistance and reach the programmed output value at the DUT. This algorithm is
not deterministic — it cannot be guaranteed to reach the programmed target value. Therefore, there
are controls to fine-tune the LLEC performance.
When enabled, the algorithm performs a number of iterations to determine the appropriate output
voltage. The
pulse_meas_sm
and
pulse_meas_wfm
commands enable or disable LLEC. See
Load-line effect compensation (LLEC)
(on page 5-34) for more information on LLEC.
LLEC is configured by setting the number of maximum iterations that will be performed and setting an
acceptance window for one or both PMU channels. LLEC will continue until either the output voltage
to the DUT falls within the acceptance window or until the maximum number of iterations are
performed.
Use
KI_PXU_LLC_MAX_ITERATIONS
to set the maximum number of iterations (integer from 1 to
1000) to be performed. LLEC only performs the iterations that are needed to determine the
appropriate voltage setting to provide the desired level at the DUT. The remaining iterations are not
performed.
Use
KI_PXU_CHx_LLC_OFFSET
to set the offset of the tolerance window
Use
KI_PXU_CHx_LLC_TOLERANCE
to set the gain of the tolerance window (in percentage of
desired signal level).
The LLEC tolerance window:
LLEC window = LLC_TOLERANCE * Desired V LLC_OFFSET
LLEC is satisfied when:
Measured voltage < Desired voltage ± LLEC Window
For example, assume the programmed pulse output is 1 V and the acceptance window is set to 0.1
(10%) and offset to 10 mV. LLEC will perform iterations until the output voltage falls within the 0.9 V
to 1.1 V window
Setting a smaller tolerance will result in voltage steps that are much closer to the desired voltage
steps sizes, but at the expense of longer test times.
When selecting and configuring an LLEC iteration method, remember that testing speed is affected
by the maximum number of iterations as well as the tolerance window. Choosing a high maximum
number of iterations and a tight tolerance will result in much longer test times.
Example
setmode(PMU1, KI_PXU_CH1_LLC_TOLERANCE, 0.01);
This command sets the LLEC for channel 1 of the PMU for a 1% acceptance window.
Also see
(on page 13-129) (SMU)
(on page 13-182) (4210-CVU)
