Service Information
5-14
2. The mainframe sends the ROM address location to be
read over the IDDATA line. The ROM then transmits an
acknowledge signal back to the mainframe, and it then
transmits data at that location back to the mainframe
(Figure 5-10).
3. The mainframe then transmits an acknowledge signal,
indicating that it requires more data. The ROM will then
sequentially transmit data after each acknowledge sig-
nal it receives.
4. Once all data is received, the mainframe sends a stop
command, which is a low-to-high transition of the IDDA-
TA line with the IDCLK line held high (see Figure 5-9).
5.5.2 ID data circuits
Upon power-up, card identification information from each
card is read by the mainframe. This ID data includes such in-
formation as card ID, hardware settling time, and relay con-
figuration information.
ID data is contained within an on-card EEPROM (U104). In
order to read this information, the sequence described below
is performed on power-up.
1. The IDDATA line (pin 6 of U104) is set from high to low
while the IDCLK line (pin 5 of U104) is held high. This
transition initiates a start command to the ROM to trans-
mit data serially to the mainframe (Figure 5-9).
Figure 5-8
Model 7015 block diagram
To Mainframe
CLK
Data
Strobe
Enable
Relay
Drivers
U100-
U103,
U105
Solid State
Relays
User connections
ID CLK
ID DATA
ROM
U104
+6V
To Mainframe
K100-K179
+5V
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Summary of Contents for 7015-S
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