FGZ806EF2/EOP
11
Pin No.
Pin Name
I/O
Purpose / Description / Processing / Operation
7~11
D3~D7
I/O
CPU data input and output
12
CGND2
-
Ground input
13
D8
I/O
CPU data input and output
14
D9
I/O
CPU data input and output
15
D10
I/O
CPU data input and output
16
CVCC2
-
Power supply
17, 18
D11, D12
I/O
CPU data input and output
19
CGND3
-
Ground
20~22
D13~D15
I/O
CPU data input and output
23
PGND
-
Ground
24
CAP0
-
The external capacity terminal for multiplication circuit
25
PVCC
-
Power supply
26
CS0
I
Chip selection 0 (UGM)
27
CS1
I
Chip selection 1 (internal register)
28
RD
I
Lead Strobe
29
WE0
I
The write-in pulse 0 (low rank side)
30
WE1
I
The write-in pulse 1 (higher rank side)
31
DACK
I
DMA acknowledge
32
MODE0
I
Mode terminal 0 of operation
33
MODE1
I
Mode terminal 1 of operation
34
MODE2
I
Mode terminal 2 of operation
35
TEST
O
Test terminal
36
RESET
I
Reset
37
CLK0
I
Q2i operation clock
38
GND1
-
Ground input
39, 40
A1, A2
I
CPU address input
Power supply input
CPU address input
Ground
CPU address input
Un-connecting
Ground
Memory data input and output
Ground
Memory data input and output
71
VCC2
-
Power supply
72~78
MD6~MD12
I/O
Memory data input and output
79
GND5
-
Ground
80, 81
MD13, MD14
I/O
Memory data input and output
82
VCC3
-
Power supply
83
MD15
I/O
Memory data input and output
84
MWE
O
A memory write-in pulse
85
MRAS0
O
A low selection signal
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