30
07 DSP
TXMRX DSP
(ADSP-21363)
Clock: 331.776MHz
ADC
PCM4202
RX IF
MIC
DAC
AK4396
SP
ANO
TX IF
AGCV
DAC
AK4387
ANI / USB-Audio
Play back
ADC
WM8782
Recording
BEEP
DAC
AK4387
USB-Audio
DAC
AK4387
SCP DSP
(ADSP-21363)
Clock: 331.776MHz
ADC
AD9649
SCP IF
FPGA
VoIP
Digital
Analog
Fig. 31 DSP Hardware Block Diagram
Signal Processing in the IF Stage
The IF AGC for signal reception forms the core that determines the character of the TS-890S.
Following advancements of analog circuits and digital signal processing, the IF-AGC has undergone many innovative
developments while inheriting the tradition. New enhancements have also been made on the TS-890S.
IF-AGC
IF ADC
RX IF
AGCV
DAC
AGC
NB Type A
NB Type B,
Notch,
IF Filter
AGC
AGC,
AGCQR
DEMOD
RX Audio
Soft Attack
CONT
Fig. 32 IF Stage Block Diagram
AGC loops of the TS-890S are placed before and after the interference rejection, such as an IF filter or notch filter. The
AGC loop of the preceding stage functions to prevent signals whose level is higher than the reference from being input
to the A/D converter for the IF input and is called the out-band AGC loop. The AGC loop of the succeeding stage has the
same AGC performance as the predecessors and is called the in-band AGC. With the in-band AGC operated after the IF
filter and interference rejection, the desired signal can be highlighted.
The basic approach to AGC response characteristics is to control the AGC amplifier gain with an ultra-high-speed attack
in the same way as conventional transceivers to control the gain without causing unnecessary amplitude fluctuation, and
to reduce factors causing fatigue due to long hours of listening.