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Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide
4
Control In / Out
Control In/Out and Trigger Input
The interfaces of the sandboxes in the FPGA designs generated by
PathWave FPGA contain the general-purpose pins GP_TRIG_IN (0..2) as
input ports and GP_TRIG_OUT (0..2) as output ports.
The front panel input ports “Control In/Out (0..4)” and the trigger input
“Trig In” can be routed to GP_TRIG_IN(0..2) and the output ports “Control
In/Out (5..9)” can be sourced by GP_TRIG_OUT (0..2) of each FPGA.
The following picture shows the switch matrix that allows to configure the
connections between the front panel and the sandbox ports: