TR850 Service Manual
114
CODEC SPI
RESET
MCBSP TO FPGA
SECURITY
DEBUG MODE
A
A
R81
4.7K
R74
33
C103
0.1uF
R60
4K7
R85
100R
1
NC_1
2
GND
3
SCL
4
SDA
5
NC_5
6
VCC
U11
Security Key
R87
100R
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
J3
CON4X2
R76
33
R65
10K
R78
33
R89
100R
R75
33
R80
4.7K
R79
33
R73
33
1
A0
2
A1
3
A2
4
GND
5
SDA
6
SCL
7
WP
8
VCC
U10
ATSHA204-SH-DA-T
R86
100R
R61
4K7
R77
33 nc
R63
4K7
V18
V19
U19
T16
R18
R19
R15
P17
U18
V16
R14
W16
V17
W17
W18
W19
VP_DIN[15]_VSYNC/UHPI_HD[7]/UPP_D[7]/PRU
VP_DIN[14]_HSYNC/UHPI_HD[6]/UPP_D[6]/PRU
VP_DIN[13]_FIELD/UHPI_HD[5]/UPP_D[5]/PRU
VP_DIN[12]/UHPI_HD[4]/UPP_D[4]/PRU0_R30[
VP_DIN[11]/UHPI_HD[3]/UPP_D[3]/PRU0_R30[
VP_DIN[10]/UHPI_HD[2]/UPP_D[2]/PRU0_R30[
VP_DIN[9]/UHPI_HD[1]/UPP_D[1]/PRU0_R30[9
VP_DIN[8]/UHPI_HD[0]/UPP_D[0]/GP6[5]/PRU
VP_DIN[7]/UHPI_HD[15]/UPP_D[15]/RMII_TXD
VP_DIN[6]/UHPI_HD[14]/UPP_D[14]/RMII_TXD
VP_DIN[5]/UHPI_HD[13]/UPP_D[13]/RMII_TXE
VP_DIN[4]/UHPI_HD[12]/UPP_D[12]/RMII_RXD
VP_DIN[3]/UHPI_HD[11]/UPP_D[11]/RMII_RXD
VP_DIN[2]/UHPI_HD[10]/UPP_D[10]/RMII_RXE
VP_DIN[1]/UHPI_HD[9]/UPP_D[9]/RMII_MHZ_5
VP_DIN[0]/UHPI_HD[8]/UPP_D[8]/RMII_CRS_D
J3
H3
V15
W14
VP_CLKIN3/MMCSD1_DAT[1]/PRU1_R30[1]/GP6[
VP_CLKIN2/MMCSD1_DAT[3]/PRU1_R30[3]/GP6[
VP_CLKIN1/UHPI_HDS1/PRU1_R30[9]/GP6[6]/
VP_CLKIN0/UHPI_HCS/PRU1_R30[10]/GP6[7]/
D19
C16
C18
SPI0_CLK/EPWM0A/GP1[8]/MII_RXCLK
SPI0_SOMI/EPWMSYNCI/GP8[6]/MII_RXER
SPI0_SIMO/EPWMSYNCO/GP8[5]/MII_CRS
C17
SPI0_ENA/EPWM0B/PRU0_R30[6]/MII_RXDV
C19
SPI0_SCS[5]/UART0_RXD/GP8[4]/MII_RXD[3]
D18
E17
D16
SPI0_SCS[4]/UART0_TXD/GP8[3]/MII_RXD[2]
SPI0_SCS[3]/UART0_CTS/GP8[2]/MII_RXD[
SPI0_SCS[2]/UART0_RTS/GP8[1]/MII_RXD[
E16
SPI0_SCS[1]/TM64P0_OUT12/GP1[7]/MDIO_CL
D17
SPI0_SCS[0]/TM64P1_OUT12/GP1[6]/MDIO_D/
G19
SPI1_CLK/GP2[13]
H17
SPI1_SOMI/GP2[11]
G17
SPI1_SIMO/GP2[10]
H16
SPI1_ENA/GP2[12]
G16
SPI1_SCS[7]/I2C0_SCL/TM64P2_OUT12/GP1[5
G18
SPI1_SCS[6]/I2C0_SDA/TM64P3_OUT12/GP1[4
F17
SPI1_SCS[5]/UART2_RXD/I2C1_SCL/GP1[3]
F16
SPI1_SCS[4]/UART2_TXD/I2C1_SDA/GP1[2]
E18
SPI1_SCS[3]/UART1_RXD/SATA_LED/GP1[1]
F19
SPI1_SCS[2]/UART1_TXD/SATA_CP_POD/GP1[0
F18
SPI1_SCS[1]/EPWM1A/PRU0_R30[7]/GP2[15]/
E19
SPI1_SCS[0]/EPWM1B/PRU0_R30[8]/GP2[14]/
F4
D5
D2
RSVD/RTC_ALARM/UART2_CTS/GP0[8]/DEEPS
AMUTE/PRU0_R30[16]/UART2_RTS/GP0[9]/PRU
AXR7/EPWM1TZ[0]/PRU0_R30[17]/GP1[15]/PRU
A4
B2
C2
A3
A2
B1
A1
AXR15/EPWM0TZ[0]/ECAP2_APWM2/GP0[7]
AFSX/GP0[12]/PRU0_R31[19]
AFSR/GP0[13]/PRU0_R31[20]
AHCLKX/USB_REFCLKIN/UART1_CTS/GP0[10]/P
AHCLKR/PRU0_R30[18]/UART1_RTS/GP0[11]/P
ACLKX/PRU0_R30[19]/GP0[14]/PRU0_R31[21]
ACLKR/PRU0_R30[20]/GP0[15]/PRU0_R31[22]
P4
R3
R2
R1
T3
T2
T1
U3
U2
U1
V3
V2
V1
W3
W2
W1
H4
G4
F2
K3
VP_CLKOUT3/PRU1_R30[0]/GP6[1]/PRU1_R31[1
VP_CLKOUT2/MMCSD1_DAT[2]/PRU1_R30[2]/GP6
K4
R5
LCD_AC_ENB_CS/GP6[0]/PRU1_R31[28]
G1
G2
J4
G3
U17
W15
U16
T15
R16
R17
PRU0_R30[25]/MMCSD1_DAT[0]/UPP_CHB_CLOCK
PRU0_R30[24]/MMCSD1_CLK/UPP_CHB_START/GP
PRU0_R30[23]/MMCSD1_CMD/UPP_CHB_ENABLE/G
PRU0_R30[22]/PRU1_R30[8]/UPP_CHB_WAIT/GP
PRU0_R30[29]/UHPI_HCNTL0/UPP_CHA_CLOCK/G
PRU0_R30[28]/UHPI_HCNTL1/UPP_CHA_START/G
PRU0_R30[27]/UHPI_HHWIL/UPP_CHA_ENABLE/G
PRU0_R30[26]/UHPI_HRW/UPP_CHA_WAIT/GP6[
PRU0_R30[30]/UHPI_HINT/PRU1_R30[11]/GP6
PRU0_R30[31]/UHPI_HRDY/PRU1_R30[12]/GP6
C1
D3
F3
D1
E3
E2
E1
AXR6/CLKR0/GP1[14]/MII_TXEN/PRU0_R31[6]
AXR5/CLKX0/GP1[13]/MII_TXCLK
AXR0/ECAP0_APWM0/GP8[7]/MII_TXD[0]/CLKS0
AXR4/FSR0/GP1[12]/MII_COL
AXR3/FSX0/GP1[11]/MII_TXD[3]
AXR2/DR0/GP1[10]/MII_TXD[2]
AXR1/DX0/GP1[9]/MII_TXD[1]
B4
B3
E4
C4
C5
D4
C3
AXR14/CLKR1/GP0[6]
AXR13/CLKX1/GP0[5]
AXR8/CLKS1/ECAP1_APWM1/GP0[0]/PRU0_R31[8
AXR12/FSR1/GP0[4]
AXR11/FSX1/GP0[3]
AXR10/DR1/GP0[2]
AXR9/DX1/GP0[1]
N1
SATA_REFCLKN
N2
SATA_REFCLKP
J2
SATA_TXN
J1
SATA_TXP
L2
SATA_RXN
L1
SATA_RXP
M3
NC_M3
F1
VP_DOUT[15]/LCD_D[15]/UPP_XD[7]/GP7[7]/B
VP_DOUT[14]/LCD_D[14]/UPP_XD[6]/GP7[6]/B
VP_DOUT[13]/LCD_D[13]/UPP_XD[5]/GP7[5]/B
VP_DOUT[12]/LCD_D[12]/UPP_XD[4]/GP7[4]/B
VP_DOUT[11]/LCD_D[11]/UPP_XD[3]/GP7[3]/B
VP_DOUT[10]/LCD_D[10]/UPP_XD[2]/GP7[2]/B
VP_DOUT[9]/LCD_D[9]/UPP_XD[1]/GP7[1]/BOO
VP_DOUT[8]/LCD_D[8]/UPP_XD[0]/GP7[0]/BOO
VP_DOUT[7]/LCD_D[7]/UPP_XD[15]/GP7[15]/P
VP_DOUT[6]/LCD_D[6]/UPP_XD[14]/GP7[14]/P
VP_DOUT[5]/LCD_D[5]/UPP_XD[13]/GP7[13]/P
VP_DOUT[4]/LCD_D[4]/UPP_XD[12]/GP7[12]/P
VP_DOUT[3]/LCD_D[3]/UPP_XD[11]/GP7[11]/P
VP_DOUT[2]/LCD_D[2]/UPP_XD[10]/GP7[10]/P
VP_DOUT[1]/LCD_D[1]/UPP_XD[9]/GP7[9]/PRU
VP_DOUT[0]/LCD_D[0]/UPP_XD[8]/GP7[8]/PRU
MMCSD1_DAT[5]/LCD_HSYNC/PRU1_R30[5]/GP8[
MMCSD1_DAT[4]/LCD_VSYNC/PRU1_R30[4]/GP8[
MMCSD1_DAT[6]/LCD_MCLK/PRU1_R30[6]/GP8[1
MMCSD1_DAT[7]/LCD_PCLK/PRU1_R30[7]/GP8[1
U4-C
OMAP-L138ZWT
SYM 2 OF 3
R62
4K7
R64
33
R84
100R
R88
100R
1
A0
2
A1
3
A2
4
GND
5
SDA
6
SCL
7
TEST
8
VCC
U23
AT24C08
C318
0.1uF
R92
100
R93
100
R103
100
R104
100
R111
100
R112
NC
R113
NC
R114
10K
R115
10K
R116
10K
R117
NC
R118
10K
R30
NC
R82
NC
R83
NC
R101
33
R102
33
R108
33
FB49
BLM15AG221SN1D
FB50
BLM15AG221SN1D
FB51
BLM15AG221SN1D
FB57
BLM15AG221SN1D
FB62
BLM15AG221SN1D
FB63
BLM15AG221SN1D
FB64
BLM15AG221SN1D
C341
270P
C342
270P
C343
270P
C350
270P
C355
NC
C356
NC
C357
270P
C351
270P
C352
270P
FB58
BLM15AG221SN1D
FB59
BLM15AG221SN1D
FB53
BLM15AG221SN1D
FB54
BLM15AG221SN1D
C346
270P
C347
270P
C348
270P
C349
270P
FB55
BLM15AG221SN1D
FB56
BLM15AG221SN1D
C358
NC
C359
NC
C360
NC
C361
NC
C362
NC
C363
NC
C364
NC
C365
NC
C366
NC
C367
NC
C368
NC
R66
10K
R67
10K
R68
NC
R69
NC
R70
NC
R71
NC
R72
10K
4
3
2
1
8
7
6
5
J4
SDIP8
R145
4.7K
3V3_OMAP
3V3_OMAP
3V3_OMAP
3V3_OMAP
I2C0_SCL
I2C0_SDA
UART2_TXD
GPS_RXD
UART2_RXD
GPS_TXD
MCBSP_CLKR
MCBSP_CLKX
MCBSP_FSR
MCBSP_DR
MCBSP_FSX
MCBSP_DX
CODEC_DOUT
CODEC_DIN
CODEC_FS
CODEC_CLK
RMII_REF_CLK
RMII_RXD0
RMII_RX_ER
RMII_RXD1
RMII_CRSDV
RMII_TXD1
RMII_TXD0
RMII_TXEN
M
SPI0_CLK
SPI0_MOSI
SPI0_MISO
CODEC_RESET
SPK_MODE
POWER_TX_ENABLE
TX_VCO_SEL
VCC8_TX
TX_LD
PHY_RESET#
AD_RDY
LED0
LED1
LED2
LED3
LED4
LED5
LED6
LED7
TX_ENABLE
FAN_CONTROL
EXT_IO4
EXT_IO5
EXT_IO6
EXT_IO7
EXT_IO8
EXT_IO1
EXT_IO2
EXT_IO3
PHY_INT
POWER_TEMP_DET
EXT_IO10
EXT_IO11
EXT_IO12
EXT_IO13
EXT_PWR_EN
GPS_PWR_EN
AD9864_SPI_CS1
RX_PLL_CS1
TX_PLL_CS
DAC_FS
I2C0_SCL
BOOT1
PHY_RESET#0
BOOT3
BOOT4
I2C0_SDA
VERB0
VERB1
VERB2
3V3_OMAP
FANSPEED
3V3_OMAP
GPS
TX
POWER
POWER_TX
TX_
MDIO_D
MDIO_CLK
BOOT1
PHY_RESET#
BOOT3
BOOT4
PHY_RESET#
BOOT4
BOOT1
BOOT3
I2C0_SDA
I2C0_SCL
I2C0_SDA
I2C0_SCL
TX_
3V3_OMAP
POWER
POWER_TX
POWER_SWITCH
GPS
AD9864_FS1
TX
M
Summary of Contents for TR850
Page 1: ......
Page 45: ...TR850 Service Manual 5 4 Connection 1 2 3 4 6 8 7 5 9 10 13 14 15 16 18 17 11 12 41 ...
Page 90: ...TR850 Service Manual Figure 1 Rx Module Top Board PCB View 86 ...
Page 91: ...TR850 Service Manual Figure 2 Rx Module Bottom Board PCB View 87 ...
Page 93: ...TR850 Service Manual Figure 5 Power Amplifier Module Bottom Board PCB View 89 ...
Page 94: ...TR850 Service Manual Figure 6 Baseband Mainboard Top Board PCB View 90 ...
Page 95: ...TR850 Service Manual Figure 7 Baseband Mainboard Bottom Board PCB View 91 ...
Page 97: ...TR850 Service Manual Figure 10 Power Board Top Board PCB View 93 ...
Page 114: ...TR850 Service Manual Figure 16 Baseband Mainbaord Schematic Diagram 110 ...
Page 169: ...TR850 Service Manual Figure 1 Rx module Top Board Position Mark Diagram 165 ...
Page 170: ...TR850 Service Manual Figure 2 Rx Module Buttom Board Position Mark Diagram 166 ...
Page 172: ...TR850 Service Manual Figure 5 Power Amplifier Module Buttom Position Mark Diagram 168 ...
Page 173: ...TR850 Service Manual Figure 6 Baseband Mainboard Top Board Position Mark Diagram 169 ...
Page 174: ...TR850 Service Manual Figure 7 Baseband Mainboard Buttom Board Position Mark Diagram 170 ...
Page 176: ...TR850 Service Manual Figure 10 Power Board Top Board Position Mark Diagram 172 ...
Page 193: ...TR850 Service Manual Figure 16 Baseband Mainboard Schematic Diagram 189 ...