Page A - 6
Doc.ID: 34938, Rev 1.0
CP-RIO3-42
CP342
CUSTOMER SPECIFIC
P R E L I M A R Y
A.5
Rear I/O Interface on J1 (CPCI rJ2)
Table A-2: Rear IO J1 Pinout (CPCI rJ2)
PIN
ROW Z
ROW A
ROW B
ROW C
ROW D
ROW E
ROW F
22
NC
NC
NC
NC
NC
NC
GND
21
NC
NC
GND
NC
NC
NC
GND
20
NC
NC
GND
NC
NC
NC
GND
19
NC
GND
GND
NC
NC
+3.3V
GND
18
NC
NC
NC
NC
NC
NC
GND
17
NC
NC
NC
NC
NC
NC
GND
16
NC
NC
NC
NC
NC
NC
GND
15
NC
NC
NC
NC
NC
NC
GND
14
NC
L LAN1R_DA-
NC
L LAN1R_DC-
GND
13
NC
L LAN1R_DB-
NC
L LAN1R_DD-
GND
12
NC
L LAN2R_DA-
NC
L LAN2R_DC-
GND
11
NC
L LAN2R_DB-
NC
L LAN2R_DD-
GND
10
NC
GND
NC
NC
NC
NC
GND
9
NC
NC
GND
NC
GND
NC
GND
8
NC
NC
GND
NC
GND
NC
GND
7
NC
GND
NC
NC
NC
GND
GND
6
NC
NC
GND
NC
GND
NC
GND
5
NC
NC
GND
NC
GND
NC
GND
4
NC
NC
+5V
NC
NC
GND
GND
3
NC
NC
GND
NC
NC
NC
GND
2
NC
NC
NC
NC
NC
NC
GND
1
NC
NC
NC
NC
NC
NC
GND
