CP6006-SA – User Guide, Rev. 0.5 Preliminary
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1.4.
Technical Specification
Table 1: CP 6006(X)-SA Main Specifications
Processor & Chipset
Processsor
The CP6006(X)-SA supports the following 4
th
generation processors:
Intel® Xeon® Processor D-1500, integrating a PCH and a dual 10 GbE NIC.
D-1539, 8 core, 12 MByte cache, 1.6GHz
D-1548, 8 core, 12 MByte cache, 2.0 GHz
D-1559, 12 core, 18 MByte cache, 1.5 GHz, on request
Memory
System Memory
Up to 32 GByte SODIMM dual channel DDR4 memory with ECC and
data speed of up to 2133 MHz per channel
Socket for optional M.2 Solid State Drive
Two redundant 16 MByte SPI Flashes
Flash Memory
Two 16 MB SPI boot flash chips for two separate uEFI BIOS images
Socket for M.2 Solid State Drive (SSD)
EEPROM
EEPROM with 64 kbit
Interfaces
CompactPCI
CompactPCI interface:
Compliant with CompactPCI Specification PICMG
2.0 R 3.0:
System controller operation
64-bit
/
66 MHz PCI or PCI-X master interface with dedicated PCIe-to-PCI-X
bridge
3.3V or 5V signaling levels (universal signaling support)
Compliant with the Packet Switching Specification PICMG 2.16
The CP6006(X)-SA supports System Master hot swap functionality and application-
dependent hot swap functionality when used in a peripheral slot.
When used as a System Master, the CP6006(X)-SA supports individual clocks for each
slot and the ENUM signal handling is in compliance with the PICMG 2.1 Hot Swap
Specification.
When installed in a peripheral slot, the CP6006(X)-SA is isolated from the CompactPCI
bus. It receives power from the backplane and supports rear I/O and, if the system
supports it, packet switching (in this case up to two channels of Gigabit Ethernet).
Standard Rear I/O
The following interfaces are routed to the rear I/O connectors J3 and J5.
COMA (RS-232 signaling) and COMB (RS-232 signaling); no buffer on the rear I/O
module is necessary
4 x USB 2.0
1 x CRT VGA, 2 x HDMI/DVI
2 x Gigabit Ethernet (compliant with PICMG 2.16, R 1.0)
4 x SATA 3 Gb/s (up to)
4 x GPIs and 4 GPOs (LVTTL signaling)
System write protection