Functional Description
EBC2
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© 2005 Kontron Modular Computers GmbH
ID 29022, Rev. 01
26873
.02.VC.050120/135423
P R E L I M I N A R Y
2.3.1.4
Test and Programming Interface
The Test and Programming interface supports JTAG/DEBUG and ISP operations. This inter-
face can be used for connecting hardware emulators and debuggers (COP), and for “in system
programming” (ISP) of programmable hardware as well as in system testing (JTAG). It is com-
prised of a set of six signals whereby some are common to all three interfaces and some are
dedicated to only one.
The following table provides a listing of the Test and Programming interface signals and a brief
description.
2.3.1.5
Terminal and Console Interface
The EBC2 provides two serial interfaces for supporting a terminal port and a low speed com-
munications interface (console) for firmware updating. These interfaces are realized using the
CPU on-chip dual UART, and as such provide only a two wire interface without hardware hand-
shake signals.
The following table provides a listing of the Terminal and Console interface signals and a brief
description.
Table 2-5: Test and Programming Interface Signal Description
SIGNAL
DESCRIPTION
TCK
Test Clock in for JTAG/ISP and emulator/debugger
TDI
Test Data In for JTAG/ISP and emulator/debugger
TDO
Test Data Out JTAG/ISP and emulator/debugger
TMS
Test Mode Select, input for JTAG/ISP and emulator/debugger
TRST
Test Reset, input for JTAG/ISP and emulator/debugger
COP_HRST/HRST
Hard Reset, emulator/debugger hard reset In
COP_SRST/SRESET
Soft Reset, emulator/debugger soft reset In
CKSTP_IN
Emulator/debugger specific signal
CKSTP_OUT
Emulator/debugger specific signal
EMU_VCC
Reference Voltage of the JTAG/DEBUG core
Table 2-6: Terminal and Console Interface Signal Description
SIGNAL
DESCRIPTION
TxD1, TxD2 (TERM, CONS)
Serial Transmit Data outputs, channel 1 and 2
RxD1, RxD2 (TERM, CONS)
Serial Receive Data signal inputs, channel 1 and 2