SBC-815ET-VER User’s Guide page 83
Code Description
OCh Reserved
ODh Reserved
OEh Test FOOOh segment shadow to see whether it is RAV-able or not. If test fails,
keep beeping the speaker.
OFh Reserved
lOh
Auto detect flash type to load appropriate flash R/W codes into the run time area
in F000 for ESCD & DMI support.
llh Reserved
12h
Use walking l's algorithm to check out interface in CMOS circuitry. Also set real-
time clock power status, and then check for override.
13h Reserved
14h Program chipset default values into chipset. Chipset default values are
MODBINable by OEM customers.
15h Reeserved
16h
Initial Early Init Onboard Generator switch.
17h Reserved
18h
Detect CPU information including brand, SMI type (Cyrix or Intel) and CPU level
(586 or 686).
19h Reserved
lAh Reserved
lBh
Initial interrupts vector table. If no special specified, all H/W interrupts are
directed to SPURIOUS INT HDLR&S/W interrupts to SPURIOUS soft HDLR.
ICh Reserved
lDh
Initial EARLY PM INIT switch.
lEh Reserved
lFh
Load keyboard matrix (notebook platform)
20h Reserved
21h
HPM initialization (notebook platform)
22h Reserved
23h
1. Check validity of RTC value: e.g. a value of 5 Ah is an invalid value for RTC
minute. 2. Load CMOS settings into BIOS stack. If CMOS checksum fails, use
default value instead. 3. Prepare BIOS resource map for PCI & PnP use. If
ESCD is valid, take into consideration of the ESCD's legacy information. 4.
Onboard clock generator initialization. Disable respective clock resource to
empty PCI & DIMM slots. 5. Early PCI initialization: -Enumerate PCI bus
number -Assign memory & I/O resource -Search for a valid VGA device & VGA
BIOS, and put it into C000:0.
24h Reserved
25h Reserved
26h Reserved
27h
Initialize INT 09 buffer
Summary of Contents for SBC-815ET-VER
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