Laird MSD45N
Hardware Integration Guide, version 1.1
Embedded Wireless Solutions Support Center:
http://ews-support.lairdtech.com
www.lairdtech.com/wireless
12
Laird Technologies
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Pin
#
Name
I/O
Default
State
Ref.
Description
If Unused
56
SDIO_CLK
I
Hi-Z
VDD_IO
SDIO Clock (25 MHz max)
57
SDIO_DATA_0
I/O
Pull-H
VDD_IO
SDIO Data 0
58
SDIO_DATA_3
I/O
Pull-H
VDD_IO
SDIO Data 3
59
SDIO_DATA_1
I/O
Pull-H
VDD_IO
SDIO Data 1
60
GND
-
Ground
Must be
connected to
GND
Note 1:
If the following lines are available on the radio you are integrating into your system, you must
connect and control them with the host device.
CHIP_PWD_L
SYS_RST_L
BT_RST_L
VDDIO_DR
If the radio stays powered up and the host goes down or is reset, communications cannot be re-
established with the radio. The host SDIO controller must re-establish communication with the
radio by reloading the radio firmware after a power-on or a reset.
Note Regarding CHIP_PWD_L: During power on/down period, the CHIP_PWD_L must be held in low state
longer than 5
µ
sec (T
A
and T
B
) after the VCC3_3 reaches its high state. See
Figure 3
.
To reset the MSD45N, set the CHIP_PWD_L in low state longer than 5
µ
sec (T
C
). See
Figure 4
.
Figure 3: Power on/down timing
Figure 4: Reset timing
