17
THE WCLK INPUT
The input is situated on the back panel and
appears as a BNC connector.
It is marked "DIG IN”.
The input is made according to WCLK
requirements, unbalanced, impedance 75
ohms, sensitivity 200 mV.
A internal jumper is provided to switch the
input to high-Z state.
A signal present at the "DIG IN” input is
displayed by the "MODULE INPUT ACTIVE”
LED on the frontpanel.
THE INPUT AMPLIFIER
The input signal is fed to a fast amplifier which
is capable to drive even weak signals to the
internal TTL level.
THE SYNC OPTION
When the "SYNC OPTION” module is present,
a valid
Fs
or
256 Fs
Signal, fed from the option
module, is
always
processed with priority. This
will be displayed by the "OPTION INPUT
ACTIVE” LED.
The absence of input signals – and for this
reason no output signal – is displayed by the
"NO INPUT SIGNAL” LED.
THE WCLK OUTPUTS
Eight ouputs are situated on the back panel of
the case. They are denoted as "DIG OUT 1 / 2
/ 3 / 4 / 5 / 6 / 7 / 8” and equipped with BNC
connectors.
The outputs offer appropriate drivers and meet
the requirements for WCLK signals, unbal-
anced, impedance 75 ohms, output level > 2,3
Vss.
To solve often occuring problems with incorrect
engineered WCLK inputs of subsequent appli-
ances, the output impedances of the module
may be set to 50 ohms by internal jumpers.
This is resulting in an output level of > 3,5 Vss.
When the "SYNC MODULE” is present, the
outputs 5 … 8 may be set by jumpers to
operate with 256Fs-functionality for “Super-
clock” use.
WCLK SPLITTER MODULE
(if this Modul is present)
