T
ABLE OF
C
ONTENTS
CHAPTER
1
I
NTRODUCTION
1
1.1 S
PECIFICATIONS
2
1.2 P
ACKING
C
HECK
L
IST
3
CHAPTER
2
J
UMPER
S
ETTING AND
C
ONNECTORS
4
2.1 B
OARD
O
UTLINE OF
IAC-F694
S
ERIES
4
2.2 I
NSTALLING AND
U
PGRADING THE
CPU
5
2.3 J
UMPER
S
ETTING
O
VERVIEW
6
2.4 J
UMPER
L
OCATIONS FOR
IAC-F694
S
ERIES
7
2.6 J
UMPER
S
ETTINGS
S
UMMARY FOR
IAC-F694 8
2.7 J
UMPER
S
ETTINGS FOR
IAC-F694
S
ERIES
9
2.7 I/O
C
ONNECTOR
L
OCATIONS FOR
IAC-F694
S
ERIES
12
2.8 I/O
C
ONNECTOR
S
UMMARY FOR
IAC-F694 13
2.9 I/O
C
ONNECTORS
D
ESCRIPTION
14
CHAPTER
3
A
WARD
BIOS S
ETUP
21
3.1 R
UNNING
A
WARD
BIOS
21
3.2 CMOS
S
ETUP
U
TILITY
22
3.3 S
TANDARD
CMOS S
ETUP
24
3.4 BIOS
F
EATURES
S
ETUP
26
3.5 C
HIPSET
F
EATURES
S
ETUP
29
3.6 I
NTEGRATED
P
ERIPHERALS
32
3.7 P
OWER
M
ANAGEMENT
S
ETUP
35
3.8 P
N
P/PCI C
ONFIGURATION
40
3.9 PC
H
EALTH
S
TATUS
42
3.10
F
REQUENCY
/
VOLTAGE CONTROL
43
3.11
L
OAD
F
AIL
-S
AFE
D
EFAULTS
44
3.12 L
OAD
O
PTIMIZED
D
EFAULTS
44
3.13
S
ET
S
UPERVISOR
/ U
SER
P
ASSWORD
45
3.14
S
AVE
& E
XIT
S
ETUP
45
3.15 E
XIT
W
ITHOUT
S
AVING
45