1W UHF AMPLIFIER ASSEMBLY
PUB99-92 rev 1: June 19, 2000
92-2
1
W UHF Amplifier
2.0
Pre-amplifier 10A1453G7 :
Figures 92-3
The Pre-amplifier module is a conservatively designed broadband amplifier which can operate on
frequencies between 470MHz to 860MHz with a excellent gain of about 18dB. It also has a very good
return loss and DC current stability with temperature.
The RF output of the channel processor or exciter is fed to this amplifier which raises the level to about
40mW to achieve 1W at the output of the final amplifier. This module requires no tuning nor bias
adjustments. The Pre-amp DC supply voltage is 24V, and it draws about 200mA (class A).
3.0
PA Module 21B1324G2:
Figures 92-4, 92-5, 92-6
Power Amplifier 21B1324G2 is a dual device amplifier module. Adequate length RF cables are part of, and
attached to, each board assembly 21B1334G1; input cable simply plug in to the output of the corresponding
side of the pre-amp assembly, and output cable plugs in to the input of the directional coupler.
The power amplifier (schematic, Figure 92-6) consists of two FET amplifiers type MRF181 paralleled in RF
phase quadrature, and operated in class A. Amplifier operating bias and over-current protection is provided
by an industry-standard type
μ
A723 regulator IC.
After the quadrature hybrid splitter HY1, each MRF181 amplifier input is matched with the equivalent of an L
network followed by a
π
network. The input circuit begins with a short section of 50 ohm microstrip line then a
coupling capacitor (C100 or C110) then a short section of lower impedance microstrip which provides some
inductance, then an adjustable capacitor (C101 or C111) to ground, then a considerable length of the same
impedance (which behaves as a larger inductance), then the input of the FET whose gate capacitance forms
the output side of the
π
matching network. This matching arrangement is good for operation from 470
through 860 MHz, and minor tweaking of the adjustable capacitors C101 and/or C111 provides flat response
over the range.
The output circuit is similar except it uses narrower (higher impedance) microstrip lines because the output
impedance of the FET is higher than its input impedance. The output match consists of the equivalent of a
Tee followed by an L; the input of the L is adjustable with variable capacitor C103 or C113. This capacitor is
adjusted to provide flat response over the range. An output coupling capacitor C104 or C114 completes the
match to 50 ohms; two outputs are combined in a quadrature hybrid HY2.
Bias to the gates of the FETs passes through R100 or R110 from balance controls RV100 or RV110.
The bias regulator U1 uses an
μ
A723 (MC1723CD) to provide approximately 6½ volts to the gate bias
controls RV100 & RV110. Voltage divider R5, R6 provides the inverting input of the regulator error amplifier
with a sample of the output voltage, and the wiper of RV3 provides the non inverting input with its reference
signal which is an adjustable fraction of the 7.15V built-in reference of the
μ
A723. The adjustment of RV3
therefore should be able to give us an output within the range from zero to approximately 9 volts. R4 and C2
are a phase-lead network; C1 together with the internal collector impedance of the error amplifier provides a
phase-lag network; and R3, C4 provide another phase-lag. All are there to frequency-compensate the
feedback system and maintain regulator stability.
Drain current of the two FETs is sampled by the voltage drop across R7, R8, and R9. When this voltage
exceeds approximately 0.5V at normal operating temperature (about 1.5 amps total FET current), Q3 begins
conduction and feeds voltage to pin 2 of the regulator to start its current foldback limiter circuit. The regulator
reduces its output voltage, which in turn reduces the bias on the FETs, they decrease their drain currents,
reducing the voltage drop across R7, R8, R9 and over-current protection is achieved. CR1 protects Q3
emitter-base junction from current inrush to C3 and C107 charging during start-up.
Setting up is performed during initial factory testing by first setting RV110 to its maximum CCW position so
that Q2 receives no bias voltage, therefore should not conduct, then setting RV3 for regulator output at U1
pin 10 to +6.5 ± 0.2 volts. An ammeter is connected in series with the +24V supply lead. Then, RV100 is set
for 300 mA reading on the ammeter due to Q1 conduction. Next, RV110 is set for Q2 also 300 mA so that
we read Q1 + Q2 = twice as much current = 600mA.
